A29160B Series
algorithm - an internal algorithm that automatically times the
program pulse widths and verifies proper program margin.
Device erasure occurs by executing the proper erase
command sequence. This initiates the Embedded Erase
The hardware sector protection feature disables operations
for both program and erase in any combination of the
sectors of memory. This can be achieved via programming
equipment.
algorithm
-
an internal algorithm that automatically
The Write Protect (
) features protects the 16 Kbyte boot
WP
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper erase margin. The Unlock Bypass mode
facilitates faster programming times by requiring only two
write cycles to program data instead of four.
sector from erasure by asserting a logic low on the
pin,
WP
whether or not the sector had been previously protected.
The Erase Suspend/Erase Resume feature enables the user
to put erase on hold for any period of time to read data from,
or program data to, any other sector that is not selected for
erasure. True background erase can thus be achieved.
The host system can detect whether a program or erase
The hardware
pin terminates any operation in
RESET
progress and resets the internal state machine to reading
array data. The pin may be tied to the system reset
operation is complete by observing the RY /
pin, or by
BY
reading the I/O7 (
Polling) and I/O6 (toggle) status bits.
Data
RESET
After a program or erase cycle has been completed, the
device is ready to read array data or accept another
command.
The sector erase architecture allows memory sectors to be
erased and reprogrammed without affecting the data
contents of other sectors. The A29160B is fully erased when
shipped from the factory.
circuitry. A system reset would thus also reset the device,
enabling the system microprocessor to read the boot-up
firmware from the Flash memory.
The device offers power-saving features. The system can
place the device into the standby mode. Power consumption
is greatly reduced in the standby modes.
Pin Configurations
TSOP (I)
A15
A14
A13
A12
A11
A10
A9
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
2
BYTE
VSS
I/O15(A-1)
I/O7
3
4
5
6
I/O14
I/O6
7
A8
8
I/O13
I/O5
9
A19
NC
10
11
12
13
14
15
16
17
I/O12
I/O4
WE
RESET
NC
VCC
I/O11
I/O13
I/O10
I/O2
A29160BV
WP
RY/BY
A18
A17
I/O9
A7
A6
A5
A4
A3
A2
A1
18
19
20
21
22
23
24
I/O1
I/O8
I/O0
OE
VSS
CE
A0
PRELIMINARY (June, 2016, Version 0.0)
2
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
