A29160B Series
Common Flash Memory Interface (CFI)
The Common Flash Interface (CFI) specification outlines
device and host system software interrogation handshake,
which allows specific vendor-specified software algorithms to
be used for entire families of devices. Software support can
then be device-independent, JEDEC ID-independent, and
forward- and backward-compatible for the specified flash
device families. Flash vendors can standardize their existing
interface for long-term compatibility.
ready to read array data. The system can read CFI
information at the addresses given in Table 5-8. In word
mode, the upper address bits (A7-MSB) must be all zeros.
To terminate reading CFI data, the system must write the
reset command.
The system can also write the CFI query command when the
device is in the autoselect mode. The device enters the CFI
query mode, and the system can read CFI data at the
addresses given in Table 5-8. The system must write the
reset command to return the device to the autoselect mode.
This device enters the CFI Query mode when the system
writes the CFI Query command, 98h, to address 55h in word
mode (or address AAh in byte mode), any time the device is
Table 5. CFI Query Identification String
Addresses
Addresses
(Byte Mode)
20h
Data
Description
(Word Mode)
10h
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
11h
22h
Query Unique ASCII string “QRY”
12h
24h
13h
26h
Primary OEM Command Set
14h
28h
15h
2Ah
Address for Primary Extended Table
16h
2Ch
17h
2Eh
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
18h
30h
19h
32h
1Ah
34h
Table 6. System Interface String
Addresses
(Word Mode)
1Bh
Addresses
(Byte Mode)
36h
Data
Description
0045h
0055h
VCC Min. (write/erase)
I/O7- I/O4 : volt, I/O3- I/O0: 100 millivolt
1Ch
38h
VCC Max. (write/erase)
I/O7- I/O4: volt, I/O3- I/O0: 100 millivolt
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
3Ah
3Ch
3Eh
40h
42h
44h
46h
48h
4Ah
4Ch
0000h
0000h
0004h
0000h
000Ah
0000h
0005h
0000h
0004h
0000h
Vpp Min. voltage (00h = no Vpp pin present)
Vpp Max. voltage (00h = no Vpp pin present)
Typical timeout per single byte/word write 2N μs
Typical timeout for Min. size buffer write 2N μs (00h = not supported)
Typical timeout per individual block erase 2N ms
Typical timeout for full chip erase 2N ms (00h = not supported)
Max. timeout for byte/word write 2N times typical
Max. timeout for buffer write 2N times typical
Max. timeout per individual block erase 2N times typical
Max. timeout for full chip erase 2N times typical (00h = not supported)
PRELIMINARY (June, 2016, Version 0.0)
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AMIC Technology, Corp.