A29040B Series
Write Operation Status
Several bits, I/O2, I/O3, I/O5, I/O6, and I/O7, are provided in
the A29040B to determine the status of a write operation.
Table 5 and the following subsections describe the functions
of these status bits. I/O7, I/O6 and I/O2 each offer a method
for determining whether a program or erase operation is
complete or in progress. These three bits are discussed first.
START
Read I/O7-I/O0
Address = VA
I/O7:
Polling
Data
The
Polling bit, I/O7, indicates to the host system
Data
whether an Embedded Algorithm is in progress or
completed, or whether the device is in Erase Suspend.
Data
pulse in
Yes
I/O
7
= Data ?
No
Polling is valid after the rising edge of the final
the program or erase command sequence.
WE
During the Embedded Program algorithm, the device outputs
on I/O7 the complement of the datum programmed to I/O7.
This I/O7 status also applies to programming during Erase
Suspend. When the Embedded Program algorithm is
complete, the device outputs the datum programmed to I/O7.
The system must provide the program address to read valid
status information on I/O7. If a program address falls within a
No
I/O5 = 1?
protected sector,
Polling on I/O7 is active for
Data
approximately 2µs, then the device returns to reading array
data.
Yes
During the Embedded Erase algorithm,
produces a "0" on I/O7. When the Embedded Erase algorithm
is complete, or if the device enters the Erase Suspend mode,
Polling
Data
Read I/O
Address = VA
7
- I/O0
Polling produces a "1" on I/O7.This is analogous to the
Data
complement/true datum output described for the Embedded
Program algorithm: the erase function changes all the bits in
a sector to "1"; prior to this, the device outputs the
"complement," or "0." The system must provide an address
within any of the sectors selected for erasure to read valid
status information on I/O7.
Yes
I/O7
= Data ?
After an erase command sequence is written, if all sectors
selected for erasing are protected,
Polling on I/O7 is
No
Data
active for approximately 100µs, then the device returns to
reading array data. If not all selected sectors are protected,
the Embedded Erase algorithm erases the unprotected
sectors, and ignores the selected sectors that are protected.
When the system detects I/O7 has changed from the
complement to true data, it can read valid data at I/O7 - I/O0
on the following read cycles. This is because I/O7 may
change asynchronously with I/O0 - I/O6 while Output Enable
FAIL
PASS
Note :
1. VA = Valid address for programming. During a sector
erase operation, a valid address is an address within any
sector selected for erasure. During chip erase, a valid
address is any non-protected sector address.
(
) is asserted low. The
Polling Timings (During
Data
OE
Embedded Algorithms) figure in the "AC Characteristics"
section illustrates this. Table 5 shows the outputs for
Data
Polling algorithm.
2. I/O
7
should be rechecked even if I/O
may change simultaneously with I/O
5 = "1" because
I/O7
5
.
Polling on I/O7. Figure 3 shows the
Data
Figure 3. Data Polling Algorithm
PRELIMINARY
(December, 2004, Version 0.2)
11
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
