A29040B Series
Block Diagram
I/O
0
- I/O
7
VCC
VSS
Erase Voltage
Generator
Input/Output
Buffers
WE
State
Control
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data Latch
Command
Register
CE
OE
Y-Decoder
Address Latch
STB
VCC Detector
Timer
Y-Gating
X-decoder
Cell Matrix
A0-A18
Pin Descriptions
Pin No.
A0 - A18
I/O
0
- I/O
7
Description
Address Inputs
Data Inputs/Outputs
Chip Enable
Write Enable
Output Enable
Ground
Power Supply
CE
WE
OE
VSS
VCC
PRELIMINARY
(December, 2004, Version 0.2)
3
AMIC Technology, Corp.