A29002/A290021 Series
Hardware Reset (
Parameter
) (N/A on A290021)
Description
RESET
Test Setup
Max
All Speed Options
Unit
JEDEC
Std
tREADY
20
μs
Pin Low (During Embedded
RESET
Algorithms) to Read or Write (See Note)
tREADY
Max
500
ns
Pin Low (Not During Embedded
RESET
Algorithms) to Read or Write (See Note)
tRP
tRH
Min
Min
500
50
ns
ns
Pulse Width
RESET
RESET
High Time Before Read (See Note)
Note: Not 100% tested.
Timings
RESET
CE, OE
t
RH
RESET
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
RESET
t
RP
Temporary Sector Unprotect (N/A on A290021)
Parameter
JEDEC
Description
All Speed Options
Unit
Std
tVIDR
tRSP
VID Rise and Fall Time (See Note)
Min
Min
500
4
ns
μs
Setup Time for Temporary Sector
RESET
Unprotect
Note: Not 100% tested.
Temporary Sector Unprotect Timing Diagram
12V
0 or 5V
RESET
0 or 5V
t
VIDR
tVIDR
Program or Erase Command Sequence
CE
WE
t
RSP
(December, 2010, Version 1.6)
18
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
