A29001/A290011 Series
The sector erase architecture allows memory sectors to
be erased and reprogrammed without affecting the data
contents of other sectors. The A29001 is fully erased
when shipped from the factory.
The hardware sector protection feature disables
operations for both program and erase in any
combination of the sectors of memory. This can be
achieved via programming equipment.
The Erase Suspend feature enables the user to put erase
on hold for any period of time to read data from, or
program data to, any other sector that is not selected for
erasure. True background erase can thus be achieved.
Power consumption is greatly reduced when the device is
placed in the standby mode.
The hardware
RESET
pin terminates any operation in
progress and resets the internal state machine to reading
array data (This feature is not available on the A290011).
Pin Configurations
DIP
PLCC
NC on A290011
1
2
3
4
VCC
WE
NC
4
3
2
1
32
RESET
NC on A290011
A15
VCC
A12
A16
WE
31
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
VSS
31
30
29
A14
A13
A8
A9
A11
OE
A10
CE
I/O
7
I/O
6
I/O
5
I/O
4
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
5
6
7
8
9
10
11
12
13
30
NC
RESET
32
A29001/A290011
5
6
7
8
9
10
11
12
13
14
15
16
28
27
26
25
24
23
22
21
20
19
18
17
29
28
27
A14
A13
A8
A9
A11
OE
A10
CE
I/O
7
A29001L/
A290011L
26
25
24
23
22
21
14
15
16
17
18
19
I/O
5
VSS
I/O
1
I/O
2
I/O
3
I/O
4
I/O
3
TSOP/sTSOP (Forward type)
A11
A9
A8
A13
A14
NC
WE
VCC
RESET
A16
A15
NC on A290011 A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
VSS
I/O
2
I/O
1
I/O
0
A0
A1
A2
A3
A29001V/A290011V
A29001X/A290011X
(December, 2004, Version 1.3)
2
AMIC Technology, Corp.
I/O
6
20
AMICC [ AMIC TECHNOLOGY ]
