A29001B/A290011B Series
Hardware Reset (
Parameter
)(N/A on A290011B)
Description
RESET
Test Setup
All Speed Options
Unit
JEDEC
Std
tREADY
Pin Low (During Embedded Algorithms) to
Read or Write (See Note)
RESET
Max
Max
20
μs
tREADY
Pin Low (Not During Embedded Algorithms)
to Read or Write (See Note)
RESET
500
ns
tRP
tRH
Min
Min
500
50
ns
ns
Pulse Width
RESET
RESET
High Time Before Read (See Note)
Note: Not 100% tested.
Timings
RESET
CE, OE
t
RH
RESET
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
RESET
t
RP
Temporary Sector Unprotect (N/A on A290011B)
Parameter
JEDEC Std
Description
All Speed Options
Unit
tVIDR
tRSP
VID Rise and Fall Time (See Note)
Min
Min
500
4
ns
μs
Setup Time for Temporary Sector Unprotect
RESET
Note: Not 100% tested.
Temporary Sector Unprotect Timing Diagram
12V
0 or 5V
RESET
0 or 5V
t
VIDR
t
VIDR
Program or Erase Command Sequence
CE
WE
t
RSP
PRELIMINARY (June, 2016, Version 0.0)
18
AMIC Technology, Corp.