A25L40P Series
MEMORY ORGANIZATION
The memory is organized as:
524,288 bytes (8 bits each)
8 sectors (one (4/4/8/16/32) Kbytes & 64x7 Kbytes
2048 pages (256 bytes each).
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector or Bulk
Erasable (bits are erased from 0 to 1) but not Page Erasable.
Table 2. Memory Organization
A25L40PT Top Boot Block Address Table
Sector
Sector Size (Kbytes)
Address Range
7-4
7-3
7-2
7-1
7-0
6
4
7F000h
7E000h
7C000h
78000h
70000h
60000h
50000h
40000h
30000h
20000h
10000h
00000h
7FFFFh
7EFFFh
7DFFFh
7BFFFh
77FFFh
6FFFFh
5FFFFh
4FFFFh
3FFFFh
2FFFFh
1FFFFh
0FFFFh
4
8
16
32
64
64
64
64
64
64
64
5
4
3
2
1
0
A25L40PU Bottom Boot Block Address Table
Sector
Sector Size (Kbytes)
Address Range
7
6
64
64
64
64
64
64
64
32
16
8
70000h
60000h
50000h
40000h
30000h
20000h
10000h
08000h
04000h
02000h
01000h
00000h
7FFFFh
6FFFFh
5FFFFh
4FFFFh
3FFFFh
2FFFFh
1FFFFh
0FFFFh
07FFFh
03FFFh
01FFFh
00FFFh
5
4
3
2
1
0-4
0-3
0-2
0-1
0-0
4
4
PRELIMINARY (May, 2007, Version 0.4)
8
AMIC Technology Corp.