A25L20P/A25L10P/A25L05P Series
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4.) sets the
Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and
Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving
Chip Select ( ) Low, sending the instruction code, and then
S
driving Chip Select ( ) High.
S
Figure 4. Write Enable (WREN) Instruction Sequence
S
0
1
2
3
4
5
6
7
C
Instruction
DIO
High Impedance
DO
Write Disable (WRDI)
﹣ Power-up
The Write Disable (WRDI) instruction (Figure 5.) resets the
﹣ Write Disable (WRDI) instruction completion
﹣ Write Status Register (WRSR) instruction completion
﹣ Page Program (PP) instruction completion
﹣ Sector Erase (SE) instruction completion
﹣ Bulk Erase (BE) instruction completion
Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip
S
Select ( ) Low, sending the instruction code, and then driving
Chip The Write Enable Latch (WEL) bit is reset under the
following conditions:
Figure 5. Write Disable (WRDI) Instruction Sequence
S
0
1
2
3
4
5
6
7
C
Instruction
DIO
High Impedance
DO
(August, 2007, Version 1.0)
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