A25L20P/A25L10P/A25L05P Series
A25L20P MEMORY ORGANIZATION
The memory is organized as:
262,144 bytes (8 bits each)
4 sectors (one (4/4/8/16/32) Kbytes & 64x3 Kbytes
1024 pages (256 bytes each).
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector or Bulk
Erasable (bits are erased from 0 to 1) but not Page Erasable.
Table 2. Memory Organization
A25L20P Top Boot Block Address Table
Sector
3-4
3-3
3-2
3-1
3-0
2
Sector Size (Kbytes)
Address Range
4
3F000h
3E000h
3C000h
38000h
30000h
20000h
10000h
00000h
3FFFFh
3EFFFh
3DFFFh
3BFFFh
37FFFh
2FFFFh
1FFFFh
0FFFFh
4
8
16
32
64
64
64
1
0
A25L20P Bottom Boot Block Address Table
Sector
3
Sector Size (Kbytes)
Address Range
64
64
64
32
16
8
30000h
20000h
10000h
08000h
04000h
02000h
01000h
00000h
3FFFFh
2FFFFh
1FFFFh
0FFFFh
07FFFh
03FFFh
01FFFh
00FFFh
2
1
0-4
0-3
0-2
0-1
0-0
4
4
(August, 2007, Version 1.0)
8
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
