A25L20P/A25L10P/A25L05P Series
A25L05P MEMORY ORGANIZATION
The memory is organized as:
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector or Bulk
Erasable (bits are erased from 0 to 1) but not Page Erasable.
65,536 bytes (8 bits each)
1 sectors (one (4/4/8/16/32) Kbytes
256 pages (256 bytes each).
Table 4. Memory Organization
A25L05PT Top Boot Block Address Table
Sector
Sector Size (Kbytes)
Address Range
1
1
1
1
1
4
4
0F000h
0E000h
0C000h
08000h
00000h
0FFFFh
0EFFFh
0DFFFh
0BFFFh
07FFFh
8
16
32
A25L05PU Bottom Boot Block Address Table
Sector
0-4
Sector Size (Kbytes)
Address Range
32
16
8
08000h
04000h
02000h
01000h
00000h
0FFFFh
07FFFh
03FFFh
01FFFh
00FFFh
0-3
0-2
0-1
4
0-0
4
(August, 2007, Version 1.0)
10
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
