A25L020/A25L010/A25L512 Series
A25L020 MEMORY ORGANIZATION
The memory is organized as:
262,144 bytes (8 bits each)
4 64-Kbytes blocks
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector, Block, or Chip
Erasable (bits are erased from 0 to 1) but not Page Erasable.
64 4-Kbytes sectors
1024 pages (256 bytes each)
Table 2. Memory Organization
A25L020 Address Table
Block
Sector
Address Range
63
3F000h
3FFFFh
3
48
47
30000h
2F000h
30FFFh
2FFFFh
2
1
32
31
20000h
1F000h
20FFFh
1FFFFh
16
15
10000h
0F000h
10FFFh
0FFFFh
3
2
1
0
03000h
02000h
01000h
00000h
03FFFh
02FFFh
01FFFh
00FFFh
0
A25L010 MEMORY ORGANIZATION
The memory is organized as:
131,072 bytes (8 bits each)
2 64-Kbytes blocks
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector, Block, or Chip
Erasable (bits are erased from 0 to 1) but not Page Erasable.
32 4-Kbytes sectors
512 pages (256 bytes each).
Table 3. Memory Organization
A25L010 Address Table
Block
Sector
Address Range
31
1F000h
1FFFFh
1
16
15
10000h
0F000h
10FFFh
0FFFFh
3
2
1
0
03000h
02000h
01000h
00000h
03FFFh
02FFFh
01FFFh
00FFFh
0
(May, 2012, Version 2.0)
8
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
