A23L9308 Series
Preliminary
524,288 X 8 BIT CMOS MASK ROM
Features
n524,288 x 8 bit organization
nWide power supply range: +2.7V to +3.6V
nAccess time: 150ns (max.)/3V~3.6V
200ns (max.)/2.7V~3.3V
nCurrent: Operating: 15mA (max.)/3V~3.6V
10mA (max.)/2.7V~3.3V
nMask Programmed for Chip Enable (power-down)
CE/ CE , Output Enable OE/ OE /NC
nThree-state outputs for wired-OR expansion
nFull static operation
nAll inputs and outputs are directly TTL-compatible
nAvailable in 32-pin DIP, 32-pin SOP, 32-pin PLCC
packages or in DICE FORM.
Standby: 25ì A (max.)/3V~3.6V
5ì A (max.)/2.7V~3.3V
General Description
The A23L9308 high-performance Read Only Memory is
configured as 524,288 x 8 bits. It is designed to be
compatible with all microprocessors and similar
applications where high-performance, large-bit storage,
The A23L9308 offers an automatic POWER-DOWN
controlled by the Chip Enable CE/ CE input. When
CE/ CE goes low/high, the device will automatically
POWER-DOWN and remain in a low power STANDBY
and
simple
interfacing
are
important
design
mode as long as CE/ CE remains low/high. A23L9308
considerations. This device is designed for use with
operating voltage from 2.7V to 3.6V.
also offers OE/ OE /NC (Active High or Low or No
Connection), which eliminates bus contention in multiple
bus microprocessor systems.
Pin Configurations
n P-DIP / SOP
n PLCC
VCC
A18
A17
1
2
3
32
31
30
NC
A16
A15
A7
5
29
28
27
26
A14
A13
A8
A12
A7
4
5
6
7
29
28
27
26
A14
A13
A8
A6
A5
6
7
A6
A9
8
9
A4
A3
A5
A4
A3
A9
A11
25
24
A23L9308
8
9
25
24
23
22
A11
A2
A1
10
11
OE/OE/NC
A10
OE/OE/NC
A10
23
22
21
A2
A1
10
11
A0
12
13
CE/CE
O7
CE/CE
O7
O0
A0
O0
O1
12
13
14
15
16
21
20
19
18
17
O6
O5
O4
O3
O2
GND
PRELIMINARY
(October, 2001, Version 0.0)
1
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
