A23L8316/A23L83161 Series
Timing Waveforms
Propagation Delay from Address ( CE = Active, OE= Active)
t
CYC
ADDRESS
INPUTS
VALID
t
AA
tOH
VALID
DATA OUT
Propagation Delay from Chip Enable or Output Enable (Address Valid)
CHIP
ENABLE
VALID
t
ACE
OUTPUT
ENABLE
VALID
t
LZ
t
AOE
tHZ
VALID
DATA OUT
AC Test Conditions
Part No.
A23L8316/A23L83161 -70
3.0V~3.6V
A23L8316/A23L83161 -100
2.7V~3.6V
Applied Voltage
Input Pulse Levels
Input Rise and Fall Time
0.4V to 2.4V
0.4V to 2.4V
10 ns
10 ns
Timing Measurement Reference Level
Output Load
VIN = 1.4V, VOUT = 1.4V
1 TTL gate and CL = 100pF
VIN = 1.4V, VOUT = 1.4V
1 TTL gate and CL = 100pF
PRELIMINARY
(July, 2004, Version 0.0)
7
AMIC Technology, Corp.