N256S0818HDA/N256S0830HDA
Advance Information
AMI Semiconductor, Inc.
WRITE Status Register Instruction (WRSR)
This instruction provides the ability to write the status register and select among several operating modes.
Several of the register bits must be set to a low ‘0’ if any of the other bits are written. The timing sequence
to write to the status register is shown below, followed by the organization of the status register.
WRITE Status Register Sequence
CS
SCK
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Instruction
Status Register Data In
SI
0
0
0
0
0
0
0
1
7
6
5
4
3
2
1
0
High-Z
SO
Status Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mode
0 0 = Word Mode
(Default)
Reserved
Must = 0
Reserved
Must = 0
Hold Function
0 = Hold (Default)
1 = No Hold
1 0 = Page Mode
0 1 = Burst Mode
1 1 = Reserved
11
This is a developmental specification and is subject to change without notice.
AMI [ AMI SEMICONDUCTOR ]
