FS6131-01
Programmable Line Lock Clock Generator IC
Table 4: Device Configuration Bits
Table 5: LOCK/IPRG Pin Configuration Bits
NAME
DESCRIPTION
NAME
DESCRIPTION
REFerence Divider SouRCe
crystal loop lock STATus mode /
main loop phase align STATus mode
(see also Table 6)
REFDSRC
(Bit 12)
Bit = 0
Bit = 1
Crystal Oscillator (VCXO)
REF pin
Bit 63 = 0
Bit 62 = 0
Crystal Loop Lock status:
Locked or Unlocked
main loop SHUT down select
SHUT
(Bit 13)
STAT[1:0]
(Bits 63-62)
Bit = 0
Bit = 1
Disabled (main loop operates)
Enabled (main loop shuts down)
Bit 63 = 0
Bit 62 = 1
Crystal Loop Lock status:
Out of Range High or Low
Bit 63 = 1
Bit 62 = 0
Phase Detector REFerence source
Main Loop Phase Align status
Feedback Divider output
PDREF
(Bit 14)
Bit = 0
Bit = 1
Reference Divider
REF pin
Bit 63 = 1
Bit 62 = 1
Phase Detector FeedBacK source
PDFBK
(Bit 15)
Bit = 0
Bit = 1
Feedback Divider
FBK pin
Table 6: Lock Status
FeedBacK Divider SouRCe
STAT
[1]
STAT
[0]
LOCK /
IPRG PIN
STAT[1]
STATUS
Bit 39 = 0
Bit 38 = 0
CMOS
Post Divider Output
READ
Bit 39 = 0
Bit 38 = 1
1
0
1
0
Locked
FBKDSRC[1:0]
(Bits 39-38)
FBK pin
1
0
0
0
1
Unlocked
Bit 39 = 1
Bit 38 = 0
VCO Output (Post Divider Input)
FBK pin
Out-of-
Range: Low
0
1
0
1
1
Bit 39 = 1
Bit 38 = 1
Out-of-
Range: High
EXTernal Loop Filter select
EXTLF
(Bit 42)
Bit = 0
Bit = 1
Internal Loop Filter
EXTLF pin
Table 7: Main Loop Tuning Bits
OSCillator TYPe
Bit = 0
OSCTYPE
(Bit 45)
Low Phase Jitter Oscillator
NAME
DESCRIPTION
VCO SPeeD range select (see Table 16)
Bit = 1
FS6031 Compatible Oscillator
VCOSPD
(Bit 44)
OUTput MUltipleXer select
Bit = 0
Bit = 1
High Speed Range
Low Speed Range
Bit 47 = 0
Bit 46 = 0
Main Loop PLL (VCO Output)
Main Loop Charge Pump current
Bit 47 = 0
Bit 46 = 1
OUTMUX[1:0]
(Bits 47-46)
Reference Divider Output
Phase Detector Input
VCXO Output
Bit 41 = 0
Current = 1.5µA
Bit 40 = 0
Bit 47 = 1
Bit 46 = 0
Bit 41 = 0
MLCP[1:0]
(Bits 41-40)
Current = 5µA
Bit 40 = 1
Bit 47 = 1
Bit 46 = 1
Bit 41 = 1
Current = 8µA
Bit 40 = 0
clock GobBLer control
Bit 41 = 1
GBL
(Bit 48)
Current = 24µA
Bit 40 = 1
Bit = 0
Bit = 1
No Clock Phase Adjust
Clock Phase Delay
Loop Filter Time Constant (internal)
LFTC
(Bit 43)
CLKP/CLKN output mode
Bit = 0
Bit = 1
Short Time Constant: 13.5µs
Long Time Constant: 135µs
PECL Output
Bit = 0
CMOS
(Bit 60)
(positive-ECL output drive)
CMOS Output /
Lock Status Indicator
Bit = 1
13
AMI [ AMI SEMICONDUCTOR ]
