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AMIS-30624PGA 参数 Datasheet PDF下载

AMIS-30624PGA图片预览
型号: AMIS-30624PGA
PDF下载: 下载PDF文件 查看货源
内容描述: I2C微Motordriver [I2C Microstepping Motordriver]
分类和应用:
文件页数/大小: 56 页 / 2356 K
品牌: AMI [ AMI SEMICONDUCTOR ]
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AMIS-30624 I2C Microstepping Motordriver  
Data Sheet  
11.0 AC Parameters  
The AC parameters are given for Vbb and temperature in their operating ranges. All timing values of the I2C transceiver are referred to  
IHman and VILmax levels (see Figure 5).  
V
Table 6: AC Parameters  
Symbol  
Power-up  
Tpu  
Pin(s)  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
10  
Unit  
ms  
Power-up time  
Guaranteed by design  
Internal Oscillator  
fosc  
Frequency of internal oscillator  
3.6  
4.0  
4.4  
MHz  
I2C Transceiver (Generic)  
CB  
Capacitive load of each bus line  
Capacitance of SDA / SCK pin  
400 (1)  
10  
pF  
pF  
SDA  
SCK  
CI  
Pulse width of spikes which must be  
suppressed by the input filter  
tSP  
50  
ns  
I2C Transceiver (Standard Mode)  
fSCL  
SCL clock frequency  
100  
kHz  
µs  
Hold time (repeated) START condition.  
After this period the first clock pulse is  
generated.  
tHD,START  
4.0  
tLOW  
tHIGH  
LOW period of the SCK clock  
HIGH period of the SCK clock  
4.7  
4.0  
µs  
µs  
Set-up time for  
condition  
a repeated START  
tSU,START  
4.7  
µs  
SDA  
SCK  
tHD,DATA  
tSU,DATA  
tR  
Data hold time for I2C bus devices  
0 (2)  
250  
3.45 (3)  
µs  
ns  
µs  
µs  
µs  
Data set-up time  
Rise time of SDA and SCK signals  
Fall time of SDA and SCK signals  
Set-up time for STOP condition  
1.0  
0.3  
tF  
tSU,STOP  
4.0  
4.7  
Bus free time between STOP and  
START condition  
I2C Transceiver (Fast Mode)  
tBUF  
µs  
fSCL  
SCL clock frequency  
360  
kHz  
µs  
Hold time (repeated) START condition.  
After this period the first clock pulse is  
generated.  
tHD,START  
0.6  
tLOW  
tHIGH  
LOW period of the SCK clock  
HIGH period of the SCK clock  
1.3  
0.6  
µs  
µs  
Set-up time for  
condition  
a repeated START  
tSU,START  
0.6  
µs  
SDA  
SCK  
tHD,DATA  
tSU,DATA  
tR  
Data hold time for I2C bus devices  
0 (2)  
100 (4)  
0.9 (3)  
µs  
ns  
ns  
ns  
µs  
Data set-up time  
Rise time of SDA and SCK signals  
Fall time of SDA and SCK signals  
Set-up time for STOP condition  
20 + 0.1CB  
20 + 0.1CB  
0.6  
300  
300  
tF  
tSU,STOP  
Bus free time between STOP and  
START condition  
tBUF  
1.3  
µs  
AMI Semiconductor – Apr. 2007, Rev 3.1, M-20664-003  
10  
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