AMIS-30623 LIN Microstepping Motordriver
Data Sheet
SetPositionShort()
This command is provided to the circuit by the LIN Master to drive one, two or four motors to a given absolute position. It applies only
for half stepping mode (StepMode[1:0]= “00”) and is ignored when in other stepping modes. See Positioning. for more details.
The physical address is coded on 4 bits, hence SetPositionShortcan only be used with a network implementing a maximum of 16
slave nodes. These 4 bits are corresponding to the bits PA[3:0]in OTP memory (address 0x02) See Physical Address of the Circuit
The priority encoder table (See Priority Encoder) acknowledges the cases where a SetPositionShortcommand will be ignored.
SetPositionShortcorresponds to the following LIN writing frames
1.) Two (2) data bytes frame for one (1) motor, with specific identifier (type #2)
SetPositionShort Writing Frame
Byte
Content
Structure
Bit 7
*
Bit 6
*
Bit 5
0
Bit 4
ID4
Bit 3
ID3
Bit 2
ID2
Bit 1
ID1
Bit 0
ID0
0
1
2
Identifier
Data 1
Data 2
Pos[10:8]
Broad
Pos [7:0]
AD [3:0]
Where:
(*)
According to parity computation
Broad:
ID[5:0]:
If broad = ‘0’ all the stepper motors connected to the LIN bus will go to Pos[10:0]..
Dynamically allocated identifier to two data bytes SetPositionShortcommand.
2.) Four (4) data bytes frame for two (2) motors, with specific identifier (type # 2)
SetPositionShort Writing Frame
Byte
Content
Structure
Bit 4 Bit 3
ID3
Bit 7
*
Bit 6
*
Bit 5
1
Bit 2
ID2
Bit 1
ID1
Bit 0
ID0
0
0
1
2
3
4
Identifier
Data 1
Data 2
Data 3
Data 4
Pos1[10:8]
Pos2[10:8]
1
AD1[3:0]
AD2[3:0]
Pos1[7:0]
1
Pos2[7:0]
Where:
(*)
according to parity computation
ID[5:0]:
Adn[3:0]:
Posn[10:0]:
Dynamically allocated identifier to four data bytes SetPositionShortcommand.
Motor #n physical address least significant bits (n ∈ [1,2]).
Signed 11-bit position set point for Motor #n (see RAM Registers)
3.) Eight (8) data bytes frame for four (4) motors, with specific identifier (type #2)
SetPositionShort Writing Frame
Byte
Content
Structure
Bit 4 Bit 3
ID3
Bit 7
*
Bit 6
*
Bit 5
1
Bit 2
ID2
Bit 1
ID1
Bit 0
ID0
1
0
1
2
3
4
5
6
7
8
Identifier
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Pos1[10:8]
Pos2[10:8]
Pos3[10:8]
1
AD1[3:0]
Pos1[7:0]
1
Pos2[7:0]
1
Pos3[7 :0]
1
Pos4[7:0]
AD2[3:0]
AD3[3:0]
AD4[3:0]
Pos4[10 :8]
Where:
(*)
according to parity computation
ID[5:0]:
Adn[3:0]:
Posn[10:0]:
Dynamically allocated identifier to eight data bytes SetPositionShortcommand.
Motor #n physical address least significant bits (n ∈ [1,4]).
Signed 11-bit position set point for Motor #n (see RAM Registers)
AMI Semiconductor – June 2006, Rev 3.0
60
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