AMIS-30623 LIN Microstepping Motordriver
Data Sheet
9.0 Package Thermal Resistance
9.1 SOIC-20
To lower the junction-to-ambient thermal resistance, it is recommended to connect the ground leads to a PCB ground plane layout as
illustrated in Figure 3. The junction-to-case thermal resistance is depending on the copper area, copper thickness, PCB thickness and
number of copper layers. Calculating with a total area of 460 mm2, 35µm copper thickness, 1.6mm PCB thickness and 1layer, the
thermal resistance is 28°C/W, leading to a junction-ambient thermal resistance of 63°C/W,
PC20041128.1
Figure 3: PCB Ground Plane Layout Condition
9.2 NQFP-32
The NQFP is designed to provide superior thermal performance. Using an exposed die pad on the bottom surface of the package, is
partly contributing to this. In order to take full advantage of this, the PCB must have features to conduct heat away from the package. A
thermal grounded pad with thermal vias can achieve this. With a layout as shown in Figure 4 the thermal resistance junction – to –
ambient can be brought down to a level of 25°C/W.
NQFP-32
PC20041128.2
Figure 4: PCB Ground Plane Layout Condition
AMI Semiconductor – June 2006, Rev 3.0
7
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