欢迎访问ic37.com |
会员登录 免费注册
发布采购

AMIS-30621-UGA 参数 Datasheet PDF下载

AMIS-30621-UGA图片预览
型号: AMIS-30621-UGA
PDF下载: 下载PDF文件 查看货源
内容描述: [Stepper Motor Controller, 0.8A, PDSO20, 300 INCH, PLASTIC, SOIC-20]
分类和应用: 电动机控制光电二极管
文件页数/大小: 57 页 / 1017 K
品牌: AMI [ AMI SEMICONDUCTOR ]
 浏览型号AMIS-30621-UGA的Datasheet PDF文件第47页浏览型号AMIS-30621-UGA的Datasheet PDF文件第48页浏览型号AMIS-30621-UGA的Datasheet PDF文件第49页浏览型号AMIS-30621-UGA的Datasheet PDF文件第50页浏览型号AMIS-30621-UGA的Datasheet PDF文件第52页浏览型号AMIS-30621-UGA的Datasheet PDF文件第53页浏览型号AMIS-30621-UGA的Datasheet PDF文件第54页浏览型号AMIS-30621-UGA的Datasheet PDF文件第55页  
AMIS-30621 LIN Micro-stepping Motor Driver  
Data Sheet  
SetPositionShort  
This command is provided to the circuit by the LIN Master to drive one, two or four motors to a given absolute position. It applies only  
for half stepping mode (StepMode[1:0]= “00”) and is ignored when in other stepping modes. See Positioning for more details. The  
physical address is coded on four bits, hence SetPositionShortcan only be used with a network implementing a maximum of 16  
slave nodes. These four address bits are corresponding to bits AD[3:0].See Physical Address of the Circuit.  
The priority encoder table (See Priority Encoder) acknowledges the cases where a SetPositionShortcommand will be ignored.  
SetPositionShortcorresponds to the following LIN writing frames  
1) Two data bytes frame for one motor, with specific identifier (type #2)  
SetPositionShort Writing Frame  
Byte  
Content  
Structure  
Bit 7  
*
Bit 6  
*
Bit 5  
0
Bit 4  
ID4  
Bit 3  
ID3  
Bit 2  
ID2  
Bit 1  
ID1  
Bit 0  
ID0  
0
1
Identifier  
Data 1  
Pos[10:8]  
Broad  
AD [3:0]  
Pos [7:0]  
2
Data 2  
Where:  
(*)  
According to parity computation.  
Broad:  
ID[5:0]:  
If Broad = ‘0’ all the stepper motors connected to the LIN bus will go to Pos[10:0].  
Dynamically allocated identifier to two data bytes SetPositionShortcommand.  
2) Four data bytes frame for two motors, with specific identifier (type # 2)  
SetPositionShort Writing Frame  
Structure  
Bit 4 Bit 3  
ID3  
Byte  
Content  
Bit 7  
*
Bit 6  
*
Bit 5  
1
Bit 2  
ID2  
AD1[3:0]  
AD2[3:0]  
Bit 1  
ID1  
Bit 0  
ID0  
0
0
1
2
3
Identifier  
Data 1  
Data 2  
Data 3  
Data 4  
Pos1[10:8]  
1
Pos1[7:0]  
1
Pos2[10:8]  
Pos2[7:0]  
4
Where:  
(*)  
According to parity computation.  
ID[5:0]:  
Adn[3:0]:  
Posn[10:0]:  
Dynamically allocated identifier to four data bytes SetPositionShortcommand.  
Motor #n physical address least significant bits (n [1,2]).  
Signed 11-bit position set point for Motor #n (see RAM Registers).  
3) Eight data bytes frame for four motors, with specific identifier (type #2)  
SetPositionShort Writing Frame  
Structure  
Bit 4 Bit 3  
ID3  
Byte  
Content  
Bit 7  
*
Bit 6  
*
Bit 5  
1
Bit 2  
ID2  
AD1[3:0]  
Bit 1  
ID1  
Bit 0  
ID0  
1
0
1
2
3
4
5
6
7
Identifier  
Data 1  
Data 2  
Data 3  
Data 4  
Data 5  
Data 6  
Data 7  
Data 8  
Pos1[10:8]  
1
Pos1[7:0]  
Pos2[10:8]  
Pos3[10:8]  
Pos4[10 :8]  
1
AD2[3:0]  
AD3[3:0]  
AD4[3:0]  
Pos2[7:0]  
1
Pos3[7 :0]  
1
Pos4[7:0]  
8
Where:  
(*)  
According to parity computation.  
ID[5:0]:  
Adn[3:0]:  
Posn[10:0]:  
Dynamically allocated identifier to eight data bytes SetPositionShortcommand.  
Motor #n physical address least significant bits (n [1,4]).  
Signed 11-bit position set point for motor #n (see RAM Registers).  
AMI Semiconductor – Sept. 2007, Rev 1.5  
51  
www.amis.com  
 
 复制成功!