AMIS-30621 LIN Micro-stepping Motor Driver
Data Sheet
15.2 Slave Operational Range for Proper Self Synchronization
The LIN interface will synchronize properly in the following conditions:
• Vbb ≥ 7.3V
• Ground shift between master node and slave node < ±10% Vbb
It is highly recommended to use the same type of reverse battery voltage protection diode for the master and the slave nodes.
15.3 Functional Description
15.3.1. Analog Part
The transmitter is a low-side driver with a pull-up resistor and slope control. Figure 5 shows the characteristics of the transmitted signal,
including the delay between internal TxD – and LIN signal. See AC Parameters for timing values.
The receiver mainly consists of a comparator with a threshold equal to Vbb/2. Figure 5 also shows the delay between the received
signal and the internal RXD signal. See also AC Parameters for timing values.
15.3.2. Protocol Handler
This block implements:
• Bit synchronization
• Bit timing
• The MAC layer
• The LLC layer
• The supervisor
15.3.3. Electromagnetic Compatibility (EMC)
EMC behavior fulfills requirements defined by LIN specification, rev. 1.3.
15.4 Error Status Register
The LIN interface implements a register containing an error status of the LIN communication. This register is as follows:
Table 22: LIN Error Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Time
out error
Bit 2
Data
Bit 1
Header
Bit 0
Bit
error Flag
Not used
Not used
Not used
Not used
error Flag error Flag
With:
Time out error:
Data error flag:
Header error flag:
Bit error flag:
The message frame is not fully completed within the maximum length TFRAME_MAX
Checksum error ⊕ StopBit error ⊕ Length error
Parity ⊕ SynchField error
Difference in bit send and bit monitored on the LIN bus
A GetFullStatusframe will reset the error status register.
15.5 Physical Address of the Circuit
The circuit must be provided with a physical address in order to discriminate it from other ones on the LIN bus. This address is coded
on 7 bits, yielding the theoretical possibility of 128 different circuits on the same bus.
AMI Semiconductor – Sept. 2007, Rev 1.5
36
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