Analog Microelectronics, Inc.
3-1/2 Digit A/D Converter - Low Power
With HOLD And Differential Reference Inputs
AME811/AME811A/AME811R
n Digital Section
Auto-Zero Phase:
Signal Integration Phase:
Reference Integration Phase :
1000 to 3000 Counts
1000 Counts (Fixed)
0 to 2000 Counts
Digital Ground
AME811 generates an internal digital ground, typically
5V below the V+.
For signals less than full-scale, the unused reference
integration time is assigned to the autozero phase.
Clock Circuit
The clock can be generated in either of the following
three methods.
1. An external oscillator connected to “OSC1”
2. A crystal between pins “OSC1” and “OSC2”
3. A R-C oscillator using “OSC1”, “OSC2” and
“OSC3”
Segment Drivers
The backplane frequency is 1/800 of the oscillator clock
frequency. For example if the oscillator frequency is
48 KHz (3 conversions per second) the backplane fre-
quency will be 60 Hz. The segment and backplane are
at the same frequency with a nominal 5 volt amplitude.
The segment is visible (ON) when the segment and the
backplane are out of phase, otherwise it is invisible
(OFF). The polarity segment is “ON” for negative ana-
log inputs. When the TEST pin on the AME811 is pulled
to V+, all segments are turned “ON”. The display reads
-1888. During this mode the LCD segments have a
constant DC voltage impressed. DO NOT LEAVE THE
DISPLAY IN THIS MODE FOR MORE THAN SEV-
ERAL MINUTES! LCD displays may be destroyed if
operated with DC levels for extended periods.
Notes: There is no on-chip feedback resister across
osc1 and osc2.
Systems Timing
The oscillator frequency is divided by 4 prior to clock-
ing the internal decade counters. Each conversion
takes 4000 counts or 16000 oscillator clock pulses.
The timing of each phase are as follows:
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