23
BPE
Bus Parity Error is set by the
Am79C978 controller when a par-
ity error occurred on the bus inter-
face during data transfers to a
receive buffer. BPE is valid only
when ENP, OFLO, or BUFF are
set. The Am79C978 controller will
only set BPE when the advanced
parity error handling is enabled
by setting APERREN (BCR20, bit
10) to 1. BPE is set by the
that a Broadcast frame would
pass the hash filter, LAFM will be
set on the reception of a Broad-
cast frame.
This bit does not exist when the
Am79C978 controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries (BCR20, bits 7-0, SW-
STYLE is cleared to 0).
Am79C978
cleared by the host.
controller
and
20
BAM
Broadcast Address Match is set
by the Am79C978 controller
when it accepts the received
frame, because the frame’s desti-
nation address is of the type
’Broadcast.’ BAM is valid only
when ENP is set. BAM is set by
the Am79C978 controller and
cleared by the host.
This bit does not exist when the
Am79C978 controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries (BCR20, bits 7-0, SW-
STYLE is cleared to 0).
22
PAM
Physical Address Match is set by
the Am79C978 controller when it
accepts the received frame due
to a match of the frame’s destina-
tion address with the content of
the physical address register.
PAM is valid only when ENP is
set. PAM is set by the Am79C978
controller and cleared by the
host.
This bit does not exist when the
Am79C978 controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries (BCR20, bits 7-0, SW-
STYLE is cleared to 0).
19-16 RES
Reserved locations. These loca-
tions should be read and written
as zeros.
This bit does not exist when the
Am79C978 controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries (BCR20, bits 7-0, SW-
STYLE is cleared to 0).
15-12 ONES
These four bits must be written as
ones. They are written by the host
and
unchanged
by
the
Am79C978 controller.
11-0 BCNT
Buffer Byte Count is the length of
the buffer pointed to by this de-
scriptor, expressed as the two’s
complement of the length of the
buffer. This field is written by the
host and unchanged by the
Am79C978 controller.
21
LAFM
Logical Address Filter Match is
set by the Am79C978 controller
when it accepts the received
frame based on the value in the
logical address filter register.
LAFM is valid only when ENP is
set. LAFM is set by the
RMD2
Am79C978
controller
and
Bit
Name
Description
cleared by the host.
Note that if DRCVBC (CSR15, bit
14) is cleared to 0, only BAM, but
not LAFM will be set when a
Broadcast frame is received,
even if the Logical Address Filter
is programmed in such a way that
a Broadcast frame would pass
the hash filter. If DRCVBC is set
to 1 and the Logical Address Fil-
ter is programmed in such a way
31
ZERO
This field is reserved. The
Am79C978 controller will write a
zero to this location.
30-16 RFRTAG
Receive Frame Tag. Indicates
the Receive Frame Tag applied
from the EADI interface. This field
is user defined and has a default
value of all zeros. When RX-
FRTG (CSR7, bit 14) is set to 0,
202
Am79C978
AMD [ AMD ]
