D A T A
Table 2.
S H E E T
Am29DL800BT Top Boot Sector Architecture
Sector Address
Bank Address
Bank
Sector
SA0
SA1
SA2
SA3
SA4
SA5
SA6
Bank 2
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
Bank 1
SA18
SA19
SA20
SA21
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
X
X
16/8
0
0
0
0
0
1
0
1
X
32/16
8/4
8/4
F0000h–F1FFFh
F2000h–F3FFFh
F4000h–F7FFFh,
F8000h–FBFFFh
FC000h–FFFFFh
78000h–78FFFh
79000h–79FFFh
7A000h–7BFFFh
7C000h–7DFFFh
7E000h–7FFFFh
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
0
1
0
1
0
1
0
0
1
0
0
1
1
0
1
1
X
0
1
8/4
8/4
X
X
X
X
X
X
X
0
0
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
32/16
64/32
64/32
64/32
64/32
64/32
64/32
64/32
16/8
70000h–7FFFFh
80000h–8FFFFh
90000h–9FFFFh
A0000h–AFFFFh
B0000h–BFFFFh
C0000h–CFFFFh
D0000h–DFFFFh
E0000h–E3FFFh
E4000h–E7FFFh,
E8000h–EBFFFh
EC000h–EDFFFh
EE000h–EFFFFh
38000h–3FFFFh
40000h–47FFFh
48000h–4FFFFh
50000h–57FFFh
58000h–5FFFFh
60000h–67FFFh
68000h–6FFFFh
70000h–71FFFh
72000h–73FFFh
74000h–75FFFh
76000h–76FFFh
77000h–77FFFh
A18
0
0
0
0
0
0
0
A17
0
0
0
0
1
1
1
A16
0
0
1
1
0
0
1
A15
0
1
0
1
0
1
0
A14
X
X
X
X
X
X
X
A13
X
X
X
X
X
X
X
A12
X
X
X
X
X
X
X
Sector Size
(Kbytes/
Kwords)
64/32
64/32
64/32
64/32
64/32
64/32
64/32
(x8)
Address Range
00000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–4FFFFh
50000h–5FFFFh
60000h–6FFFFh
(x16)
Address Range
00000h–07FFFh
08000h–0FFFFh
10000h–17FFFh
18000h–1FFFFh
20000h–27FFFh
28000h–2FFFFh
30000h–37FFFh
Note:
The address range is A18:A-1 if in byte mode (BYTE# = V
IL
). The address range is A18:A0 if in word mode (BYTE# = V
IH
).
12
Am29DL800B
21519C4 December 4, 2006
AMD [ ADVANCED MICRO DEVICES ]
