VCC < VLKO (see DC Characteristics section for
voltages). When VCC < VLKO, the command register is
disabled, all internal program/erase circuits are
disabled, and the device resets to the read mode. The
device ignores all writes until VCC > VLKO. The user
must ensure that the control pins are in the correct logic
state when VCC > VLKO to prevent uninitentional writes.
Logical Inhibit
Writing is inhibited by holding any one of OE# = VIL, CE#
= VIH or WE# = VIH. To initiate a write cycle CE# and
WE# must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
Power-up of the device with WE# = CE# = VIL and
OE# = VIH will not accept commands on the rising
edge of WE#. The internal state machine is automat-
ically reset to the read mode on power-up.
Write Pulse “Glitch” Protection
Noise pulses of less than 10 ns (typical) on OE#, CE#
or WE# will not initiate a write cycle.
FUNCTIONAL DESCRIPTION
Description Of User Modes
Table 1. Am28F256 Device Bus Operations (Notes 7 and 8)
#
#
#
WE
CE
OE
V
PP
#
#
#
Operation
(E )
(G )
(W ) (Note 1)
A0
A0
X
A9
A9
X
I/O
Read
V
V
X
X
V
V
V
D
OUT
IL
IL
PPL
PPL
PPL
Standby
V
X
HIGH Z
IH
Output Disable
V
V
V
V
X
X
HIGH Z
IL
IL
IH
IH
IH
Read-Only
Auto-select Manufacturer
Code (Note 2)
V
CODE
(01h)
ID
V
V
V
V
IL
PPL
PPL
IL
(Note 3)
Auto-select Device
Code (Note 2)
V
CODE
(A1h)
ID
V
V
V
V
V
V
V
V
V
IL
IL
IL
IL
IH
IH
IH
(Note 3)
Read
A0
A9
D
PPH
OUT
(Note 4)
Standby (Note 5)
Output Disable
Write
V
X
X
V
V
V
X
X
X
X
HIGH Z
HIGH Z
IH
PPH
PPH
PPH
Read/Write
Legend:
V
V
V
V
V
IL
IL
IH
IH
IH
V
A0
A9
D
IL
IN
(Note 6)
X = Don’t care, where Don’t Care is either V or V levels. V
= V < V + 2 V. See DC Characteristics for voltage levels
PP CC
IL
IH
PPL
of V
. 0 V < An < V + 2 V, (normal TTL or CMOS input levels, where n = 0 or 9).
PPH
CC
Notes:
1.
V
may be grounded, connected with a resistor to ground, or < V + 2.0 V. V
is the programming voltage specified for
PPL
CC
PPH
the device. Refer to the DC characteristics. When V = V
, memory contents can be read but not written or erased.
PP
PPL
2. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 2.
3. 11.5 < V < 13.0 V. Minimum V rise time and fall time (between 0 and V voltages) is 500 ns.
ID
ID
ID
4. Read operation with V = V
may access array data or the Auto select codes.
PP
PPH
5. With V at high voltage, the standby current is I + I (standby).
PP
CC
PP
6. Refer to Table 3 for valid D during a write operation.
IN
7. All inputs are Don’t Care unless otherwise stated, where Don’t Care is either V or V levels. In the Auto select mode all
IL
IH
addresses except A and A must be held at V .
9
0
IL
8. If V ≤ 1.0 Volt, the voltage difference between V and V should not exceed 10.0 volts. Also, the Am28F256 has a V
PP
CC
PP
CC
rise time and fall time specification of 500 ns minimum.
8
Am28F256
AMD [ AMD ]
