SWITCHING TEST WAVEFORMS
3 V
0 V
2.4 V
2.0 V
0.8 V
2.0 V
0.8 V
Test Points
1.5 V
Test Points
1.5 V
0.45 V
Input
Output
Input
Output
AC Testing (all speed options except -70): Inputs are driven at
2.4 V for a logic “1” and 0.45 V for a logic “0”. Input pulse rise
and fall times are ≤10 ns.
AC Testing for -70 devices: Inputs are driven at 3.0 V for a
logic “1” and 0 V for a logic “0”. Input pulse rise and fall times
are ≤10 ns.
11560G-15
SWITCHING CHARACTERISTICS over operating range unless otherwise specified
AC Characteristics—Read Only Operation
Parameter Symbols
JEDEC Standard
Am28F256 Speed Options
Parameter Description
Read Cycle Time (Note 2)
-70
70
70
70
35
-90
90
90
90
35
-120
120
120
120
50
-150
150
150
150
55
-200
200
200
200
55
Unit
ns
t
t
Min
Max
Max
Max
AVAV
RC
t
t
Chip Enable AccessTime
Address Access Time
ns
ELQV
CE
t
t
ns
AVQV
GLQV
ACC
t
t
Output Enable Access Time
ns
OE
Chip Enable to Output in Low Z
(Note 2)
t
t
Min
Max
Min
0
20
0
0
20
0
0
30
0
0
35
0
0
35
0
ns
ns
ns
ns
ELQX
EHQZ
GLQX
GHQZ
LZ
Chip Disable to Output in High Z
(Note 1)
t
t
t
DF
Output Enable to Output in Low Z
(Note 2)
t
OLZ
Output Disable to Output in High Z
(Note 2)
t
t
Max
20
20
30
35
35
DF
Output Hold from first of Address,
CE#, or OE# Change (Note 2)
t
t
Min
Min
Min
0
6
0
6
0
6
0
6
0
6
ns
µs
µs
AXQX
OH
t
Write Recovery Time before Read
WHGL
V
Setup Time to Valid Read
CC
t
50
50
50
50
50
VCS
(Note 2)
Notes:
1. Guaranteed by design not tested.
2. Not 100% tested.
26
Am28F256
AMD [ AMD ]
