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AM186ER-25KIW 参数 Datasheet PDF下载

AM186ER-25KIW图片预览
型号: AM186ER-25KIW
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186-和80C188兼容的16位嵌入式微控制器与内存 [High-Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers with RAM]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 112 页 / 2732 K
品牌: AMD [ AMD ]
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5-V supply, then the 5-V circuitry in the system may  
start driving the processor’s inputs above the maxi-  
mum levels (VCC + 2.6 V). The system design  
should ensure that the 5-V supply does not exceed  
2.6 V above the 3.3-V supply during a power-on se-  
quence.  
LOW-VOLTAGE OPERATION  
The low-voltage operation of the Am186ER and  
Am188ER microcontrollers is an enabling technology  
for the design of portable systems with long battery life.  
This capability, combined with CPU clock management,  
enables design of very low-power computing systems.  
n Preferably, all inputs will be driven by sources that  
can be three-stated during a system reset condition.  
The system reset condition should persist until sta-  
ble VCC conditions are met. This should help ensure  
that the maximum input levels are not exceeded  
during power-up conditions.  
Low-Voltage Standard  
Industry standards for low-voltage operation are  
emerging to facilitate the design of components that  
will make up a complete low-voltage system. As a  
guideline, the Am186ER and Am188ER microcontrol-  
ler specifications follow the first article or regulated ver-  
sion of the JEDEC 8.0 low-voltage proposal. This  
standard proposal calls for a VCC range of 3.3 V ± 10%.  
n Preferably, all pullup resistors will be tied to the  
3.3-V supply, which will ensure that inputs requiring  
pullups are not over stressed during power-up.  
Power Savings  
CMOS dynamic power consumption is proportional to  
the square of the operating voltage multiplied by capac-  
itance and operating frequency. Static CPU operation  
can reduce power consumption by enabling the system  
designer to reduce operating frequency when possible.  
However, operating voltage is always the dominant fac-  
tor in power consumption. By reducing the operating  
voltage from 5 V to 3.3 V for any device, the power  
consumed is reduced by 56%.  
Reduction of CPU and core logic operating voltage dra-  
matically reduces overall system power consumption.  
Additional power savings can be realized as low-voltage  
mass storage and peripheral devices become available.  
Two basic strategies exist in designing systems con-  
taining the Am186ER and Am188ER microcontrollers.  
The first strategy is to design a homogenous system in  
which all logic components operate at 3.3 V. This pro-  
vides the lowest overall power consumption. However,  
system designers may need to include devices for  
which 3.3-V versions are not available. In the second  
strategy, the system designer must then design a  
mixed 5-V/3.3-V system. This compromise enables the  
system designer to minimize the core logic power con-  
sumption while still including functionality of the 5-V  
features. The choice of a mixed voltage system design  
also involves balancing design complexity with the  
need for the additional features.  
Input/Output Circuitry  
To accommodate current 5-V systems, the Am186ER  
and Am188ER microcontrollers have 5-V tolerant I/O  
drivers. The drivers produce TTL-compatible drive out-  
put (minimum 2.4-V logic High) and receive TTL and  
CMOS levels (up to VCC + 2.6 V). The following are  
some design issues that should be considered when  
upgrading an Am186ER microcontroller 5-V design:  
n During power-up, if the 3.3-V supply has a signifi-  
cant delay in achieving stable operation relative to  
Am186TMER and Am188TMER Microcontrollers Data Sheet  
59  
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