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AM186EM-33VC/W 参数 Datasheet PDF下载

AM186EM-33VC/W图片预览
型号: AM186EM-33VC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186- / 80C188兼容和80L186- / 80L188兼容的16位嵌入式微控制器 [High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 98 页 / 1582 K
品牌: AMD [ AMD ]
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P R E L I M I N A R Y  
ASYNCHRONOUS SERIAL PORT  
SYNCHRONOUS SERIAL INTERFACE  
The Am186EM and Am188EM microcontrollers pro-  
vide an asynchronous serial port. The asynchronous  
serial port is a two-pin interface that permits full-duplex  
bidirectional data transfer. The asynchronous serial  
port supports the following features:  
The synchronous serial interface (SSI) lets the  
Am186EM and Am188EM microcontrollers communi-  
cate with application-specific integrated circuits  
(ASICs) that require reprogrammability but are short on  
pins. This four-pin interface permits half-duplex, bidi-  
rectional data transfer at speeds of up to 20 Mbits/sec.  
n Full-duplex operation  
n 7-bit or 8-bit data transfers  
n Odd, even, or no parity  
n 1 or 2 stop bits  
Unlike the asynchronous serial port, the SSI operates  
in a master/slave configuration. The Am186EM and  
Am188EM microcontrollers are the master port.  
The SSI interface provides four pins for communicating  
with system components: two enables (SDEN0 and  
SDEN1), a clock (SCLK), and a data pin (SDATA). Five  
registers are used to control and monitor the interface.  
If additional RS-232 signals are required, they can be  
created with available PIO pins. The asynchronous se-  
rial port transmit and receive sections are double buff-  
ered. Break character, framing, parity, and overrun  
error detection are provided. Exception interrupt gener-  
ation is programmable by the user.  
Four-Pin Interface  
The two enable pins SDEN1–SDEN0 can be used di-  
rectly as enables for up to two peripheral devices.  
The transmit/receive clock is based on the internal pro-  
cessor clock, which is divided down internally to the se-  
rial port operating frequency. The serial port permits 7-  
bit and 8-bit data transfers. DMA transfers through the  
serial port are not supported.  
Transmit and receive operations are synchronized be-  
tween the master (Am186EM and Am188EM micro-  
controllers) and slave (peripheral) by means of the  
SCLK output. SCLK is derived from the internal proces-  
sor clock and is the processor clock divided by 2, 4, 8,  
or 16.  
The serial port generates one interrupt for any of three  
serial port events—transmit complete, data received,  
and error.  
The serial port can be used in power-save mode, but  
the software must adjust the transfer rate to correctly  
reflect the new internal operating frequency and must  
ensure that the serial port does not receive any infor-  
mation while the frequency is being changed.  
48  
Am186/188EM and Am186/188EMLV Microcontrollers  
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