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AM186EM-33VC/W 参数 Datasheet PDF下载

AM186EM-33VC/W图片预览
型号: AM186EM-33VC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186- / 80C188兼容和80L186- / 80L188兼容的16位嵌入式微控制器 [High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 98 页 / 1582 K
品牌: AMD [ AMD ]
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P R E L I M I N A R Y  
CLKOUTB operate at either the processor frequency or  
External Source Clock  
the crystal input frequency. The output drivers for both  
clocks are individually programmable for disable.  
Figure 9 shows the organization of the clocks.  
Alternately, the internal oscillator can be driven from an  
external clock source. This source should be con-  
nected to the input of the inverting amplifier (X1), with  
the output (X2) not connected.  
The second clock output (CLKOUTB) allows one clock  
to run at the crystal input frequency and the other clock  
to run at the power-save frequency. Individual drive en-  
able bits allow selective enabling of just one or both of  
these clock outputs.  
System Clocks  
The base system clock of the 80C186 and 80C188  
microcontrollers is renamed CLKOUTA and the  
additional output is called CLKOUTB. CLKOUTA and  
Processor Internal Clock  
Power-Save  
Divisor  
(/2 to /128)  
PLL  
CLKOUTA  
Mux  
X1, X2  
Drive  
Enable  
Time  
Mux  
Delay  
CLKOUTB  
6 ±2.5ns  
Drive  
Enable  
Figure 9. Clock Organization  
After RES becomes inactive and an internal processing in-  
terval elapses, the microcontroller begins execution with  
the instruction at physical location FFFF0h. RES also sets  
some registers to predefined values.  
Power-Save Operation  
The power-save mode of the Am186EM and  
Am188EM microcontrollers reduces power consump-  
tion and heat dissipation, thereby extending battery life  
in portable systems. In power-save mode, operation of  
the CPU and internal peripherals continues at a slower  
clock frequency. When an interrupt occurs, the micro-  
controller automatically returns to its normal operating  
frequency on the internal clock’s next rising edge of t3.  
In order for an interrupt to be recognized, it must be  
valid before the internal clock’s rising edge of t3.  
The Reset Configuration Register  
When the RES input is asserted Low, the contents of the  
address/data bus (AD15–AD0) are written into the Reset  
Configuration register. The system can place configura-  
tion information on the address/data bus using weak ex-  
ternal pullup or pulldown resistors, or using an external  
driver that is enabled during reset. The processor does not  
drive the address/data bus during reset.  
Note: Power-save operation requires that clock-de-  
pendent devices be reprogrammed for clock frequency  
changes. Software drivers must be aware of clock fre-  
quency.  
For example, the Reset Configuration register could be  
used to provide the software with the position of a con-  
figuration switch in the system. Using weak external  
pullup and pulldown resistors on the address and data  
bus, the system would provide the microcontroller with  
a value corresponding to the position of the jumper dur-  
ing a reset.  
Initialization and Processor Reset  
Processor initialization or startup is accomplished by  
driving the RES input pin Low. RES must be held Low for  
1 ms during power-up to ensure proper device initializa-  
tion. RES forces the Am186EM and Am188EM microcon-  
trollers to terminate all execution and local bus activity. No  
instruction or bus activity occurs as long as RES is active.  
42  
Am186/188EM and Am186/188EMLV Microcontrollers  
 
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