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AM186EM-33VC/W 参数 Datasheet PDF下载

AM186EM-33VC/W图片预览
型号: AM186EM-33VC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186- / 80C188兼容和80L186- / 80L188兼容的16位嵌入式微控制器 [High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 98 页 / 1582 K
品牌: AMD [ AMD ]
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P R E L I M I N A R Y  
dress latch enable (ALE) signal is no longer needed.  
KEY FEATURES AND BENEFITS  
Individual byte-write-enable signals are provided to  
eliminate the need for external high/low byte-write-en-  
able circuitry. The maximum bank size that is program-  
mable for the memory chip-select signals has been  
increased to facilitate the use of high-density memory  
devices.  
The Am186EM and Am188EM microcontrollers extend  
the AMD family of microcontrollers based on the indus-  
try-standard x86 architecture. The Am186EM and  
Am188EM microcontrollers are higher-performance,  
more integrated versions of the 80C186/188 micropro-  
cessors, offering a migration path that was previously  
unavailable. Upgrading to the Am186EM and  
Am188EM microcontrollers is an attractive solution for  
several reasons:  
The improved memory timing specifications for the  
Am186EM and Am188EM microcontrollers allow no  
wait-state operation with 70-ns memory access times  
at a 40-MHz CPU clock speed. This reduces overall  
system cost significantly by allowing the use of a more  
commonly available memory speed and technology.  
n Minimized total system cost—New peripherals and  
on-chip system interface logic on the Am186EM and  
Am188EM microcontrollers reduce the cost of existing  
80C186/188 designs.  
Direct Memory Interface Example  
n X86 software compatibility—80C186/188-com-  
patible and upward-compatible with the other mem-  
bers of the AMD E86 family.  
Figure 1 illustrates the Am186EM microcontroller direct  
memory interface. The processor A19–A0 bus con-  
nects to the memory address inputs, the AD bus con-  
nects to the data inputs and outputs, and the chip  
selects connect to the memory chip-select inputs.  
n Enhanced performance—The Am186EM and  
Am188EM microcontrollers increase the perfor-  
mance of 80C186/188 systems, and the demulti-  
plexed address bus offers faster, unbuffered access  
to memory.  
The RD output connects to the SRAM Output Enable  
(OE) pin for read operations. Write operations use the byte  
write enables connected to the SRAM Write Enable (WE)  
pins.  
n Enhanced functionality—The new and enhanced  
on-chip peripherals of the Am186EM and Am188EM  
microcontrollers include an asynchronous serial  
port, 32 PIOs, a watchdog timer, an additional inter-  
rupt pin, a synchronous serial interface, a PSRAM  
controller, a 16-bit reset configuration register, and  
enhanced chip-select functionality.  
The example design uses 2-Mbit memory technology  
(256 Kbytes) to fully populate the available address  
space. Two flash PROM devices provide 512 Kbytes of  
nonvolatile program storage and two static RAM de-  
vices provide 512 Kbytes of data storage area.  
Figure 1 also shows an implementation of an RS-232  
console or modem communications port. The RS-232-  
to-CMOS voltage-level converter is required for the  
electrical interface with the external device.  
Application Considerations  
The integration enhancements of the Am186EM and  
Am188EM microcontrollers provide a high-perfor-  
mance, low-system-cost solution for 16-bit embedded  
microcontroller designs. The nonmultiplexed address  
bus eliminates the need for system-support logic to in-  
terface memory devices, while the multiplexed ad-  
dress/data bus maintains the value of previously  
engineered, customer-specific peripherals and circuits  
within the upgraded design.  
Am186EM  
Microcontroller  
Flash PROM  
X2  
WHB  
WLB  
WE  
WE  
X1  
Address  
A19A0  
40-MHz  
Crystal  
Figure 1 illustrates an example system design that  
uses the integrated peripheral set to achieve high per-  
formance with reduced system cost.  
Data  
OE  
AD15AD0  
RD  
CS  
UCS  
Clock Generation  
The integrated clock generation circuitry of the  
Am186EM and Am188EM microcontrollers allows the  
use of a times-one crystal frequency. The design in  
Figure 1 achieves 40-MHz CPU operation while using  
a 40-MHz crystal.  
Static RAM  
WE  
WE  
Serial Port  
RS-232  
Level  
Converter  
TXD  
RXD  
Address  
Data  
OE  
Memory Interface  
The integrated memory controller logic of the  
Am186EM and Am188EM microcontrollers provides a  
direct address bus interface to memory devices. The  
use of an external address latch controlled by the ad-  
LCS  
CS  
Figure 1. Example System Design  
10  
Am186/188EM and Am186/188EMLV Microcontrollers  
 
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