P R E L I M I N A R Y
SWITCHING CHARACTERISTICS over COMMERCIAL operating range
Ready and Peripheral Timing (20 MHz and 25 MHz)
Preliminary
20 MHz
Preliminary
25 MHz
Parameter
Description
Ready and Peripheral Timing Requirements
No.
Symbol
Min
Max
Min
Max Unit
47
48
tSRYCL SRDY Transition Setup Time(a)
10
3
10
3
ns
ns
tCLSRY
tARYCH
tCLARX
SRDY Transition Hold Time(a)
ARDY Resolution Transition
Setup Time(b)
ARDY Active Hold Time(a)
49
10
10
ns
50
51
52
53
54
4
4
ns
ns
ns
ns
ns
tARYCHL ARDY Inactive Holding Time
tARYLCL ARDY Setup Time(a)
6
6
15
10
10
15
10
10
tINVCH
tINVCL
Peripheral Setup Time(b)
DRQ Setup Time(b)
Peripheral Timing Responses
55
tCLTMV Timer Output Delay
25
20
ns
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA unless otherwise noted. All output test conditions
are with CL = 50 pF. For switching tests, VIL = 0.45 V and VIH = 2.4 V, except at X1 where VIH = VCC – 0.5 V.
a
b
This timing must be met to guarantee proper operation.
This timing must be met to guarantee recognition at the clock edge.
Am186/188EM and Am186/188EMLV Microcontrollers
87