P R E L I M I N A R Y
SWITCHING CHARACTERISTICS over COMMERCIAL operating range
Clock (33 MHZ and 40 MHz)
Preliminary
Parameter
Description
33 MHz
Min
40 MHz
Min
No. Symbol
CLKIN Requirements
Max
Max
Unit
36
37
38
39
40
tCKIN
X1 Period(a)
30
10
10
60
25
7.5
7.5
60
ns
ns
ns
ns
ns
tCLCK X1 Low Time (1.5 V)(a)
tCHCK X1 High Time (1.5 V)(a)
tCKHL X1 Fall Time (3.5 to 1.0 V)(a)
tCKLH X1 Rise Time (1.0 to 3.5 V)(a)
5
5
5
5
CLKOUT Timing
42
tCLCL
CLKOUTA Period
30
25
ns
CLKOUTA Low Time
(CL=50 pF)
0.5tCLCL–1.5
0.5tCLCL–1.25
=11.25
43
tCLCH
ns
=13.5
CLKOUTA High Time
(CL=50 pF)
0.5tCLCL–1.5
=13.5
0.5tCLCL–1.25
=11.25
44
45
46
tCHCL
tCH1CH2
tCL2CL1
ns
ns
ns
CLKOUTA Rise Time
(1.0 to 3.5 V)
3
3
3
3
CLKOUTA Fall Time
(3.5 to 1.0 V)
61
69
70
tLOCK Maximum PLL Lock Time
tCICOA X1 to CLKOUTA Skew
tCICOB X1 to CLKOUTB Skew
1
1
ms
ns
ns
15
21
15
21
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA unless otherwise noted. All output test conditions
are with CL = 50 pF. For switching tests, VIL = 0.45 V and VIH = 2.4 V, except at X1 where VIH = VCC – 0.5 V.
a
The specifications for CLKIN are applicable to the normal PLL and CLKDIV2 modes.
The PLL should be used for operations from 16.667 MHz to 40 MHz. For operations below 16.667 MHz, the CLKDIV2
mode should be used.
Because the CLKDIV2 input frequency is two times the system frequency, the specifications for twice the frequency should
be used for CLKDIV2 mode. For example, use the 20 MHz CLKIN specifications for 10 MHz operation.
Am186/188EM and Am186/188EMLV Microcontrollers
85
AMD [ AMD ]
