P R E L I M I N A R Y
WHB is asserted with AD15–AD8. WHB is the logical
OR of BHE and WR. This pin floats during reset.
WLB
Write Low Byte (output, three-state, synchronous)
WLB—This pin and WHB indicate to the system which
bytes of the data bus (upper, lower, or both) participate
in a write cycle. In 80C186 microcontroller designs, this
information is provided by BHE, AD0, and WR.
However, by using WHB and WLB, the standard
system interface logic and external address latch that
were required are eliminated.
WLB is asserted with AD7–AD0. WLB is the logical OR
of AD0 and WR. This pin floats during reset.
WR
Write Strobe (output, synchronous)
WR—This pin indicates to the system that the data on
the bus is to be written to a memory or I/O device. WR
floats during a bus hold or reset condition. WR should
be used for DRAM write enable.
X1
Crystal Input (input)
This pin and the X2 pin provide connections for a
fundamental mode or third-overtone, parallel-resonant
crystal used by the internal oscillator circuit. To provide
the microcontroller with an external clock source,
connect the source to the X1 pin and leave the X2 pin
unconnected.
X2
Crystal Output (output)
This pin and the X1 pin provide connections for a
fundamental mode or third-overtone, parallel-resonant
crystal used by the internal oscillator circuit. To provide
the microcontroller with an external clock source, leave
the X2 pin unconnected and connect the source to the
X1 pin.
32
Am186ED/EDLV Microcontrollers
AMD [ AMD ]
