A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Read Operations
Parameter
Speed Options
JEDEC
Std
Description
Read Cycle Time (Note 1)
Test Setup
90
100
120
Unit
t
t
Min
90
100
120
120
ns
AVAV
RC
CE# = V
OE# = V
IL
IL
t
t
t
Address to Output Delay
Max
90
100
ns
AVQV
ACC
t
t
Chip Enable to Output Delay
OE# = V
Max
Max
Max
Max
Min
90
30
100
35
16
16
0
120
50
ns
ns
ns
ns
ns
ELQV
GLQV
EHQZ
GHQZ
CE
IL
t
t
Output Enable to Output Delay
OE
t
t
Chip Enable to Output High Z (Note 1)
Output Enable to Output High Z (Note 1)
DF
DF
t
Read
Output Enable
Hold Time (Note 1)
t
OEH
Toggle and
Data# Polling
Min
Min
30
0
ns
ns
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First (Note 1)
t
t
OH
AXQX
Notes:
1. Not 100% tested.
2. See Figure 11, on page 25 and Table 7 on page 25 for test specifications.
tRC
Addresses Stable
tACC
Addresses
CE#
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Figure 13. Read Operations Timings
26
Am29SL400D
Rev. A Amend. +1 April 13, 2005
AMD [ AMD ]
