AMD
Fig u re 1 -1
Am 7 9 6 8 TAXI Tra n s m it t e r Blo c k Dia g ra m
Data Command
N
M
Strobe &
Acknowledge
Strobe (STRB)
Acknowledge (ACK
Input Latch
X1
Oscillator
and
Clock Gen.
Encoder Latch
Data Encoder
X2
Clock (CLK)
Data Mode
Select (DMS)
(SEROUT+)
Serial Out +
Media
Interface
Shifter
Test Serial In
(TSERIN)
(SEROUT–)
Serial Out –
Serial Interface
Test/Local Select (TLS)
12330E-1
Note: N can be 8, 9, or 10 bits. Total of N + M = 12.
Fig u re 1 -2
Am 7 9 6 9 TAXI Re c e ive r Blo c k Dia g ra m
(X1)
Oscillator
and
(SERIN+) Serial In +
(SERIN–) Serial In –
Media
Interface
Clock Gen.
Shifter
(X2)
PLL Clock
Generator
Decoder
Latch
(DMS) Data Mode Select
Data Decoder
(CNB) Catch Next Byte
(IGM) I-Got-Mine
Byte Sync
Logic
(CLK) Clock
Output Latch
N
M
(DSTRB) Data Strobe
(CSTRB) Command Strobe
(VLTN)
Violation
Data Command
12330E-2
Note: N can be 8, 9, or 10 bits. Total of N + M = 12.
51
TAXIchip Integrated Circuits Technical Manual