AMD
Am7969-175 TAXIchip Receiver (Notes 13, 14, 22)
Parameter
No.
Symbol
Parameter Description
Test Conditions
Min
Max
Unit
Bus Interface Signals: DO0–DO7, DO8/CO3, DO9/CO2, CO0–CO1, DSTRB, CSTRB, IGM, CLK, CNB, VLTN
35
36
tP
CLK Period (Note 24)
5.7 n
8 n
ns
ns
2t35
n
tPD
Data Valid to STRB↑ Delay
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
–2
2t35
n
37
38
tPD
tPD
tPD
tPD
tPW
tPW
tPW
tPD
tS
CLK↓ to STRB↑
ns
ns
ns
ns
ns
ns
ns
ns
ns
+15
t35
n
CLK↑ to STRB↓
–5
3t35
n
38a
39
STRB↑ to CLK↑ (Note 23)
CLK↓ to Data Valid Delay
STRB Pulse Width HIGH
CLK Pulse Width HIGH
CLK Pulse Width LOW
SERIN to CLK↓ Delay
–10
t35
n
-
+
23
5t35
2n
5t35
n
40
5t35
n
41
–7
–4
5t35
n
42
t35
2n
2t35
n
43
+17
–31
+26
t35
n
47A
CNB↓ to CLK↑ Setup Time
(Note 19)
-
47B
48
tS
tH
CNB↑ to CLK↓ Setup Time
CNB↓ to CLK↑ Hold
29
ns
ns
2t35
n
–3
2t35
n
49
tPW
CNB Pulse Width LOW
ns
ns
Serial Interface Signals: SERIN+, SERIN–
✝
57
tJ
SERIN± Peak to Peak Input Jitter
2
Tolerance (Note 16)
Miscellaneous Signals: X1 (Note 15)
60
61
tPW
tPW
X1 Pulse Width HIGH
X1 Pulse Width LOW
21
21
ns
ns
31
Am7968/Am7969-175