Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
Figure 107. nv Memory Read Timing
t
35
ERD#
t
37
(OUTPUT)
t
t
t
39
36
38
EA[15:0]
Address Valid
(OUTPUT)
t
t
41
40
EQ[7:0]
Data Valid
(INPUT)
Figure 108. nv Memory Write Timing
t
42
t
43
EWR#
t
44
(OUTPUT)
t
39
t
38
EA[15:0]
Address Valid
Data Valid
(OUTPUT)
t
t
46
45
EQ[7:0]
(OUTPUT)
190
DS1527
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