Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
PCI Configuration Registers
Table 1. PCI Configuration Registers
Byte 3 Byte 2 Byte 1 Byte 0
All PCI compliant devices are required to provide a
group of Configuration Registers for the host system.
These registers are polled during power up initializa-
tion and contain specific device and add-in card
product information including Vendor ID, Device ID,
Revision and the amount of memory required for prod-
uct operation. The S5935 can either load these
registers with default values or initialize them from an
external non-volatile memory area called ‘Configura-
tion Space’. The S5935 can accommodate a total of
256 bytes of external memory for this purpose. The
first 64 bytes is reserved for user defined configuration
data which is loaded into the PCI Configuration Regis-
ters during power-up initialization. The remaining 192
bytes may be used to implement an Expansion BIOS
or contain add-in card POST code. Table 1 shows all
the S5935 PCI Configuration Registers.
Address
00h
Device ID
Vendor ID
PCI Status
Class Code
PCI Command
Revision ID
04h
08h
Built-in
Self Test
Header
Type
Latency
Timer
Cache
Line Size
0Ch
Base Address Register 0
Base Address Register 1
Base Address Register 2
Base Address Register 3
Base Address Register 4
Reserved
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
Reserved Space
PCI Operation Registers
Reserved Space
The second group of registers are the PCI Operation
Registers shown in Table 2. This group consists of six-
teen 32-bit (DWORD) registers accessible to the Host
processor from the PCI Local bus. These are the main
registers through which the PCI Host configures
S5935 operation and communicates with the Add-On
Local bus. These registers encompass the PCI bus
incoming and outgoing Mailboxes, FIFO data channel,
Bus Master Address and Count registers, Pass-Thru
data channel registers and S5935 device Status and
Control registers.
Expansion ROM Base Address
Reserved Space
Reserved Space
Max.
Latency
Min. Grant
Interrupt
Pin
Interrupt
Line
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