Revision 1.02 – April 12, 2007
S5920 – PCI Product: Architectural Overview
FEATURES
Data Book
APPLICATIONS
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Full 132 Mbytes/sec Transfer Rate
PCI Bus Operation to 33 MHz
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ISA Conversions
Multimedia
PCI Purposed 2.2 Compliant Target/Slave
Device
I/O Ports
Data Storage
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Add-On Bus up to 40 MHz
CODEC5
Programmable Prefetch and Wait States
8/16/32-Bit Add-On Bus
General Purpose PCI Bus Interfacing
ARCHITECTURAL OVERVIEW
Four Definable Pass-Thru Regions
Two 32-Byte Burstable FIFOs
Active/Passive Add-On Bus Operation
Mailbox Registers/w Byte Level Status
Direct Mailbox Data Strobe/Int Pin
Mailbox Read/Write Interrupts
Direct PCI and Add-On Interrupt Pins
Plug-N-Play Compatible
The AMCC S5920 was developed to provide the
designer with a single multi-function device offering a
flexible and easy way to connect to the PCI bus. By
using the S5920, the designer eliminates the task of
assuring PCI bus specification compliance and the
necessity of understanding PCI bus timing require-
ments when interfacing a new application.
The complex 33 MHz PCI bus signals are converted
through the S5920 into an easy-to-use 8/16/32-bit
user bus referred to as the user Add-On bus. The Add-
On bus allows user add-on designs bus clock speed
independent operation to 40 MHz.
Two-wire Serial Bus nvRAM Support
Optional External BIOS capability
160-Pin PQFP
Figure 2. S5920 Block Diagram
User
Application
S5920
ISA
Card
PCI
Configuration
Registers
Design
ADD-ON
32
Pass-
Thru
Byte
FIFO
ISDN
FDDI
ATM
2.1 PCI
Local Bus
Interface
Logic
AMCC
ADD-ON
Local Bus
Interface
Logic
32
Byte
FIFO
PCI
Pass-
Thru
Graphics/
MPEG/
Grabber
Mux/
Demux
Mux/
Demux
Active
R/W Logic
Buffers
Pass-Thru
Address Register
Audio
Design
Data
Buffers
Mailboxes/Status
Serial
Read/Write
Control
Serial
Read/Write
Control
Operation/
Status Registers
I/O
Controller
Configuration Space
Expansion BIOS
Serial NVRAM
Serial Bus
AMCC Confidential and Proprietary
DS1596
27
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
