Data Sheet
FEATURES
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PCI 2.1 Compliant Master/Slave Device
Full 132 Mbytes/sec Transfer Rate
PCI Bus Operation DC to 33 MHz
8/16/32 Bit Add-On User Bus
3.3V Power Supply
5V Tolerant I/Os
Four Definable Pass-Thru Data Channels
Two 32 Byte Internal FIFOs w/DMA
Synchronous Add-On Bus Operation
Mail Box Registers w/Byte Level Status
Direct Mail Box Data Strobe/Interrupts
Direct PCI & Add-On Interrupt Pins
Optional Non-Volatile Memory Boot Loading
Optional Expansion BIOS/POST Code
176 Pin LQFP
Environmental Friendly Lead-Free Package
Option
DESCRIPTION
The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabili-
ties. The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the sys-
tem’s processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus stan-
dard which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering perfor-
mance more than adequate for the most demanding
applications such as full-motion video.
Applied Micro Circuits Corporation (AMCC), the pre-
mier supplier of single chip solutions, has developed
the S5335 to solve the problem of interfacing applica-
tions to the PCI Local bus while offering support for
newer PCI chipsets and operating systems. The
S5335 is a powerful and flexible PCI controller sup-
porting several levels of interface sophistication. At the
lowest level, it can serve simply as a PCI bus Target
with modest transfer requirements. For high-perfor-
mance applications, the S5335 can become a Bus
Master to attain the PCI Local bus peak transfer capa-
bility of 132 MBytes/sec. The S5335 was designed for
3.3V environment but its inputs/outputs are tolerant to
5V signaling.
APPLICATIONS
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High Speed Networking
Digital Video Applications
I/O Communications Ports
High Speed Data Input/Output
Multimedia Communications
Memory Interfaces
High Speed Data Acquisition
Data Encryption/Decryption
Intel i960 Interface
General Purpose PCI Interfacing
Figure 1. S5335 Block Diagram
S5335
Pass-Thru Data &
Address Registers
PCI Local Bus
Interface Logic
Mux/Demux
FIFOs
Buffers
Mailboxes
Read/Write
Control
Configuration
Registers
Status
Registers
Serial/Parallel nvRAM
Configuration Space
Expansion BIOS
Mux/Demux
Buffers
Proprietary
Backplane
Satellite
Receiv er/
Modem
User
Application
I/O Audio
ISDN
FDDI
ATM
Graphics/
MPEG/
Grabber
DS1657
PCI Local Bus
Bus Master Transfer
Count & Address
Registers
AMCC
Add-On
Local Bus
Interface Logic
AMCC Confidential and Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
