Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Add-On Empty/Full Status Register (AMBEF)
This register provides empty/full visibility of each byte
within the mailboxes. The empty/full status for the Out-
going mailboxes are displayed on the high order 16
bits and the empty/full status for the incoming mail-
boxes are presented on the low order 16 bits. A value
of one signifies that a given mailbox had been written
by the sourcing interface but had not yet been read by
the corresponding destination interface. An incoming
mailbox is defined as one in which data travels from
the PCI bus into the Add-On bus and an outgoing mail-
box is defined as one where data goes OUT from the
Add-On bus to the PCI interface.
Add-On Mailbox Empty/Full
Status
Register Name:
34h
Add-On Address Offset:
Power-up value:
Attribute:
00000000h
Read Only
32 bits
Size:
Figure 34. Add-On Mailbox Empty/Full Status Register
31
16 15
0 Bit
Value
Incoming Mailbox
Status (RO)
Outgoing Mailbox
Status (RO)
AMCC Confidential and Proprietary
DS1657 75