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S5335DK 参数 Datasheet PDF下载

S5335DK图片预览
型号: S5335DK
PDF下载: 下载PDF文件 查看货源
内容描述: PCI总线控制器, 3.3V [PCI Bus Controller, 3.3V]
分类和应用: 总线控制器PC
文件页数/大小: 189 页 / 2175 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 5.01 – November 30, 2005  
S5335 – PCI Bus Controller, 3.3V  
Data Sheet  
LIST OF TABLES  
Table 1. PCI Configuration Registers .................................................................................................................... 13  
Table 2. PCI Operation Registers .......................................................................................................................... 14  
Table 3. Add-On Bus Operation Registers ............................................................................................................ 15  
Table 4. Address and Data Pins — PCI Local Bus ................................................................................................ 20  
Table 5. System Pins — PCI Local Bus ................................................................................................................. 21  
Table 6. Interface Control Pins — PCI Bus Signal ................................................................................................. 21  
Table 7. Arbitration Pins (Bus Masters Only) — PCI Local Bus ............................................................................. 21  
Table 8. Error Reporting Pins — PCI Local Bus .................................................................................................... 22  
Table 9. Interrupt Pin — PCI Local Bus ................................................................................................................. 22  
Table 10. Serial nv Devices ................................................................................................................................... 23  
Table 11. Byte-Wide nv Devices ............................................................................................................................ 23  
Table 12. Register Access Pins ............................................................................................................................. 24  
Table 13. FIFO Access Pins .................................................................................................................................. 25  
Table 14. Pass-Thru Interface Pins ....................................................................................................................... 25  
Table 15. System Pins ........................................................................................................................................... 26  
Table 16. Configuration Registers ......................................................................................................................... 27  
Table 17. Vendor Identification Register ................................................................................................................ 29  
Table 18. Device Identification Register ................................................................................................................ 30  
Table 19. PCI Command Register ......................................................................................................................... 32  
Table 20. PCI Status Register ............................................................................................................................... 34  
Table 21. Revision Identification Register .............................................................................................................. 35  
Table 22. Defined Base Class Codes .................................................................................................................... 36  
Table 23. Base Class Code 00h: Early, Pre-2.0 Specification Devices ................................................................. 37  
Table 24. Base Class Code 01h: Mass Storage Controllers .................................................................................. 37  
Table 25. Base Class Code 02h: Network Controllers ........................................................................................... 37  
Table 26. Base Class Code 03h: Display Controllers ............................................................................................ 37  
Table 27. Base Class Code 04h: Multimedia Devices ........................................................................................... 37  
Table 28. Base Class Code 05h: Memory Controllers ........................................................................................... 37  
Table 29. Base Class Code 06h: Bridge Devices .................................................................................................. 38  
Table 30. Base Class Code 07h: Simple Communications Controllers ................................................................. 38  
Table 31. Base Class Code 08h: Base System Peripherals .................................................................................. 38  
Table 32. Base Class Code 09h: Input Devices .................................................................................................... 38  
Table 33. Base Class Code 0Ah: Docking Stations ............................................................................................... 39  
Table 34. Base Class Code 0Bh: Processors ........................................................................................................ 39  
Table 35. Base Class Code 0Ch: Serial Bus Controllers ....................................................................................... 39  
Table 36. Built-In Self-Test Register ...................................................................................................................... 43  
Table 37. Base Address Register — Memory (Bit 0 = 0) ....................................................................................... 46  
Table 38. Base Address Register — I/O (Bit 0 = 1) ............................................................................................... 46  
Table 39. Read Response (Memory Assigned) to an All-Ones Write Operation to a Base Address Register ...... 47  
AMCC Confidential and Proprietary  
DS1657 11