Revision 2.7 - May 2000
S4802 SONET/SDH STS-48/STM-16 Framer/Pointer Processor
PRELIMINARY SUMMARY DATASHEET
Overview and Applications
SONET Processing
The S4802 can be used in either SONET or SDH applica-
tions. On the low-speed side, it can interface to 4 groups of
either 1 STS-12/STM-4 or 4 STS-3/STM-1 signals in each
direction.
In the demultiplex direction, the S4802 accepts a 16-bit wide
STS-48/STM-16 signal. This input may have originated from
deserializing an STS-48/STM-16 signal. The S4802 locates
frame in this signal, performs descrambling, processes the
TOH bytes, and performs pointer processing. If this signal
doesn’t contain a STS-48c/AU-4-16c payload, S4802 demul-
tiplexes the signal to 4 groups of either 1 STS-12/STM-4 or 4
STS-3/STM-1 tributaries. Either these demuxed tributaries
(before or after they are pointer-processed), or tributaries
from the low-speed mux inputs are then selected. The
selected tributaries then process in the demux direction from
generators that generate the TOH bytes (or SOH bytes in
SDH mode), perform scrambling, and output the data up to
16 serial interfaces.
In the multiplex direction, the S4802 accepts 4 serial
STS-12/STM-4 (622 Mb/s) signals or 4 groups of 4 serial
(155 Mb/s) STS-3/STM-1 signals. The S4802 locates the
STS-12/STM-4 or STS-3/STM-1 frames, descrambles the
data, and processes the TOH bytes (or SOH bytes in SDH
mode). The S4802 then selects some combination of these
signals or tributaries from the demux direction by using
high-speed interfaces for pointer processing. The pointer pro-
cessor output may then be muxed into an STS-48. This
muxed signal, or the STS-48 from the demux input, or the
STS-48c/AU-4-16c from the pointer processor is then
selected as the input to the FRGEN48.
The S4802 then generates the TOH bytes (or SOH bytes in
SDH mode), performs frame synchronous scrambling, and
outputs the data on a 16-bit bus.
Low-Speed Interface
On the low-speed side, in both the mux and demux direc-
tions, the S4802 supports either 4-serial STS-12/STM-4 sig-
nals operating at 622 Mb/s or 4 groups of 4 serial
STS-3/STM-1 signals operating at 155 Mb/s. S4802 is
designed to bolt directly to fiber optic transcievers with built-in
clock data recovery. (See figure below.)
High-Speed Interface
On the high-speed side, S4802 supports 16-bit parallel
high-speed interfaces, operating at 155 MHz, on both the
multiplex and demultiplex side.
Controller Interface
A high-speed microprocessor interface is provided for config-
uration and monitoring. S4802 provides numerous automatic
monitoring functions. It can be configured to provide an inter-
rupt to the control system, or it can be operated in a polled
mode.
Typical Application:
S4802 in 2.488 Gb/s SONET/SDH Add/Drop Multiplexer Application
Microprocessor
Control
Control
Addr
13 16
Data
OC-12
FO Signal
Fiber Optic
XCVR
RxD±
SerTxD±
AMCC
S3024
CRU
SerRxCLK±
OC-12
FO Signal
Fiber Optic
XCVR
RxD±
SerTxD±
MX_CLK_OUT
AMCC
S3024
CRU
AMCC
S3024
CRU
SerRxCLK±
AMCC
S4802
MX_DATA_OUT_[15:0]
DX_CLK_IN
DX_DATA_IN_[15:0]
OC-12
FO Signal
Fiber Optic
XCVR
RxD±
SerTxD±
SerRxCLK±
AMCC
S3063/3064
P/S & S/P
SerTxD±
Fiber Optic
SONET XCVR
SerRxD±
XCVR
with
Clk Rcvry
OC-48
FO Signal
OC-12
FO Signal
Fiber Optic
XCVR
RxD±
SerTxD±
AMCC
S3024
CRU
SerRxCLK±
AMCC
200 Brickstone Square, Andover, MA 01810 Ph: 978/623-0009 Fax:978/623-0024
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
