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S2078TB 参数 Datasheet PDF下载

S2078TB图片预览
型号: S2078TB
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 2-Func, Bipolar, PBGA156, 21 X 21 MM, TBGA-156]
分类和应用: 电信电信集成电路
文件页数/大小: 24 页 / 280 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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®
DEVICE
SPECIFICATION
DUAL FIBRE CHANNEL TRANSCEIVER
DUAL FIBRE CHANNEL TRANSCEIVER
GENERAL DESCRIPTION
S2078
S2078
FEATURES
• Functionally compliant with ANSI X3T11 Fibre
Channel physical and transmission protocol
standards
• 1062 MHz (Fibre Channel) operating rate
- Half rate operation
• Dual Transmitter incorporating phase-locked
loop (PLL) clock synthesis from low speed
reference
• Dual Receiver PLL provides clock and data
recovery
• Internally Series terminated TTL outputs
• Low-jitter serial PECL interface
• Local Loopback
• Interfaces with coax, twinax, or fiber optics
• Single +3.3V supply, 1.33 W power dissipation
• Compact 21mm x 21mm 156 TBGA package
The S2078 dual transmitter and receiver chip is de-
signed to provide two channels of high-speed serial
data transmission over fiber optic or copper interfaces
conforming to the requirements of the ANSI X3T11
Fibre Channel specification. The chip runs at 1062.5
Mbps serial data rate with an associated 10-bit paral-
lel data word. The chip provides two separate receive
PLLs which can be operated asyncronously.
Each bi-directional channel provides parallel-to-se-
rial and serial-to-parallel conversion, clock genera-
tion and recovery, and framing. The on-chip transmit
PLL synthesizes the high-speed clock from a low-
speed reference. The on-chip dual receive PLL is
used for clock recovery and data re-timing on the
two independent data inputs. The transmitter and re-
ceiver each support differential PECL-compatible I/O
for copper or fiber optic component interfaces and
provide excellent signal integrity. Local loopback
mode allows for system diagnostics. The chip re-
quires a 3.3V power supply and dissipates 1.33
watts.
Figure 1 shows the use of the S2062 and S2078 in a
Fibre Channel application. Figure 2 summarizes the
input/output signals of the device. Figures 3 and 4
show the transmit and receive block diagrams, re-
spectively.
APPLICATIONS
High-speed data communications
• Switched networks
• Data broadcast environments
• Fibre Channel Switches
Figure 1. Typical Dual Fibre Channel Application
FC INTERFACE
SERIAL BP DRIVER
DUAL
FIBRE
CHANNEL
INTERFACE
MAC
(ASIC)
TO SERIAL
BACKPLANE
S2078
MAC
(ASIC)
S2062
October 13, 2000 / Revision D
1