S2060
S2060 OVERVIEW
The S2060 transmitter and receiver provide serial-
ization and deserialization functions for block en-
coded data to implement a Gigabit Ethernet
interface. The S2060 functional block diagram is de-
picted in Figure 2. The sequence of operations is as
follows:
Transmitter
1.10-bit parallel input
2. Parallel-to-serial conversion
3. Serial output
Receiver
1. Clock and data recovery from serial input
2. Serial-to-parallel conversion
3. Frame detection
4. 10-bit parallel output
The 10-bit parallel data input to the S2060 should be
from a DC-balanced encoding scheme, such as the
8B/10B transmission code, in which information to be
transmitted is encoded 8 bits at a time into 10-bit trans-
GIGABIT ETHERNET TRANSCEIVER
mission characters
1
. For reference, Table 1 shows the
mapping of the parallel data to the 8B/10B codes.
Loop Back
Local loopback provides a capability for performing
off-line testing. This is useful for ensuring the integ-
rity of the serial channel before enabling the trans-
mission medium. It also allows for system
diagnostics.
1. A.X. Widmer and P.A. Franaszek, "A Byte Oriented DC Bal-
anced (0,4) 8B/10B Transmission Code," IBM Research Report
RC 9391, May 1982.
Table 1. Data Mapping to 8B/10B
Alphabetic Representation
Data Byte
TX[0:9] or RX[0:9]
8B/10B
Alphabetic Representation
0
a
1
b
2
c
3
d
4
e
5
i
6
f
7
g
8
h
9
j
Figure 2. Functional Block Diagram
S2060
TX[0:9]
10
FIFO
(4 x 10)
10
Shift
Register
TXP
TXN
TBC
PLL Clock
Multiplier w/
lock detect
F0 = F1 x 10
RATEN
2:1
D
PLL Clock
Recovery w/
lock detect
Shift
Register
RXP
RXN
EWRAP
-LCK_REF
EN_CDET
Control
Logic
10
D
Q
RX[0:9]
COMMA
Detect
Logic
COM_DET
RBC0
RBC1
2
March 7, 2001 / Revision H
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
