S2058
PORT BYPASS AND REPEATER FOR FIBRE CHANNEL ARBITRATED LOOP
Table 1. Pin Description
Pin Name
OUTP
OUTN
INN
INP
DDIP
DDIN
Level
Diff.
LVPECL
Diff.
LVPECL
Diff.
LVPECL
I/O
Pin#
Description
Serial output to be connected to the next PBC in the loop. (See
Figure 2.) This output has been retimed by the clock and data
recovery PLL.
Serial input from the previous Port Bypass Circuit.
Serial input to the port bypass. This input should be driven by
the FC-AL disk drive connected to the port bypass. This input is
routed to the CDR block if the port bypass is in Normal
operating mode.
Reference clock for the PLL, nominally at 106.25 MHz, rising
edge active.
Loop filter capacitor pins
Active Low. When inactive, the CDR PLL will attempt to lock to
input data (normal operation). When active, the CDR PLL will be
forced to lock to the local reference clock (REFCLK). When
disconnected, the S2058 will be put into test mode and the PLL
will be bypassed for factory testing.
Active High. When active, LOCKDET indicates the CDR PLL is
locked to the serial data stream. When inactive, the CDR PLL is
locked to the local reference clock indicating a loss of data
condition. (See Lock Detect section.)
Port bypass output. This output should drive the input port of the
FC-AL disk drive.
Port bypass B bypass control. When SELB is Low, the port
bypass will be in bypass mode. When SEL is High, port bypass
will be in normal mode.
Ground pins are physically mounted to the die surface, and are
an important part of the thermal path. For best thermal
performance, all ground pins should be connected to a ground
plane, using multiple vias if possible.
+3.3V Power supply.
+3.3V Power supply for the CRU.
Ground for the CRU
Used for manufacturing test. Normal chip operation when held
Low.
Active Low. When active allows 106.25 MHz reference clock.
When inactive, allows 53.125 MHz clock.
O
6, 5
I
2, 3
I
26, 27
REFCLK
LPF1
LPF2
TTL
Analog
I
22
12, 11
LCKREFN
3 State
TTL
I
24
LOCKDET
TTL
O
17
DDON
DDOP
SEL
LVPECL
O
20, 19
TTL
I
28
GND
Ground
7, 13,
18, 23
8, 14, 21,
25
VCC
VCCA
GNDA
TEST
REFSEL
Analog
Analog
3 Level
TTL
TTL
I
I
4, 9
1, 10
16
15
4
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
