Product Specification Revision 1.2
Summary Datasheet Version 1.2 - December 2000
PRELIMINARY SUMMARY DATASHEET
ORINOCO: S1204CBI
STS-12 DS3/E3/STS-1E SONET Mapper
STS-1 Processing
Overview
The ORINOCO provides STS-1 mapper and de-mapper
functions. The STS-1 mapper accepts data from external
STS-1E inputs and/or from looped-back STS-1 tributar-
ies. The ORINOCO provides full STS-1 framing,
descrambling, performance monitoring and pointer pro-
cessing in the transmit direction. In the receive direction,
the ORINOCO provides full STS-1 frame generation and
scrambling.
SONET/SDH Processing
The ORINOCO implements SONET/SDH processing for
STS-12/STM-4 or STS-3/STM-1 data streams. It can
support STS-1 signals within an STS-12 or STS-3, or any
combination of TUG-3/AU-4 or AU-3 signals within an
STM-1 or STM-4. The ORINOCO supports the mapping
of DS3, E3 or STS-1 tributaries into SONET or SDH. For
DS3/E3/STS-1E tributaries, the ORINOCO provides full
framing and performance monitoring.
Line Interface
On the line side, the ORINOCO supports an 8-bit parallel
interface which operates at 77.76 MHz for STS-12/STM-
4 applications. In this mode, the device is connected to
the S3037 parallel-to-serial converter (see application
figure below). Optionally, the ORINOCO supports a serial
line interface which operates at 622.08 MHz for STS-12/
STM-4 applications, or at 155.52 MHz or STS-3/STM-1.
In these applications, the device is connected to the
S3024 clock recovery device.
In the SONET/SDH receive direction, the ORINOCO per-
forms framing, descrambling, and TOH monitoring,
including B1/B2 performance monitoring, serial channel
access to the DCC, User Channel and Orderwire bytes,
and monitoring of the J0, K1K2 (APS, AIS-L and RDI-L
detection), S1 and M1 bytes. While processing the
received pointers, the ORINOCO locates the start of the
embedded SPEs and provides monitoring capabilities for
the POH and pointer bytes.
APS Interface
In the SONET/SDH transmit direction, the ORINOCO
generates the appropriate SPE/VCs containing the input
DS3/E3/STS-1E signals, including generation of path
overhead (with generation of AIS-P and RDI-P). A
SONET/SDH STS-12/STM-4 or STS-3/STM-1 frame is
then created, with its corresponding TOH. The user has
the ability to control the contents of all defined TOH
bytes, including register map control of the K1K2, J0, M1
and S1 bytes, as well as serial channel access to the
DCC, User Channel and Orderwire bytes. The B1 and B2
bytes are automatically generated, as well as AIS-L and
RDI-L indications.
The ORINOCO provides APS input and output interfaces
to convey signals between two S1204 devices configured
for APS operation. This configuration supports both 1+1
and 1:1 configurations. The APS interface consists of
serial clock and data, operating a 622 MHz for STS-12/
STM-4 operation, or 155 MHz for STS-3/STM-1 opera-
tion.
System Interface
The ORINOCO supports up to 12 DS3/E3/STS1 tributar-
ies. In the SONET/SDH Receive direction, the
ORINOCO generates a serial (NRZ) data signal, accom-
panied by a smoothed DS3/E3 clock and a start of frame
indication for each DS3/E3 tributary. For STS-1E tributar-
ies, the ORINOCO provides RX serial (NRZ) data and
clock and frame start signals at 51.84 MHz.
The ORINOCO is SONET and SDH standards compliant
with Bellcore GR-253 and GR-499 and ITU G.707 and
G.783.
DS3/E3 Processing
The ORINOCO provides DS3/E3 mapper and de-mapper
functions. The DS3/E3 mapper accepts data from an
external DS3/E3 input, looped-back DS3/E3 tributaries,
or internal DS3/E3 frame generators. The ORINOCO
provides full DS3/E3 framing and performance monitor-
ing in both transmit and receive directions.
In the SONET/SDH Transmit direction, the ORINOCO
provides two modes of operation. In clear-channel mode,
the ORINOCO accepts a full DS3/E3 signal, payload and
overhead bits, and performs framing on the incoming sig-
nal. The frame start inputs are ignored in this mode of
operation. In DS3 payload only mode, the ORINOCO
accepts the DS3 payload only on the data inputs. The
frame start signal indicates the start of the payload (the
first data bit following the X1 overhead bit). The
The ORINOCO supports both M23 and C-bit parity DS3
frame formats. It provides the following DS3 mapping
options: DS3/STS-1, DS3/AU-3 and DS3/TUG-3/AU-4.
ORINOCO maps the DS3 payload data into a full DS3
frame, prior to mapping into a SONET/SDH SPE.
The ORINOCO supports both the G.751 and G.832 E3
frame formats. It provides the following E3 mapping
options: E3/AU-3 and E3/TUG-3/AU-4.
DS3/E3 Desynchronizer
The ORINOCO provides for dense DS3/E3 integration by
performing all functions related to DS3/E3 desynchroni-
zation. The clock smoother consists of a single, off-chip
clock reference together with 12 independent on-chip
digitally controlled modulators, digital filters and fre-
quency detectors. This desynchronizer circuitry provides
jitter and wander compliance to the ANSI T1-105.03-
1994 and ANSI T1-105.03b-1997 specifications.
DS3 monitoring functionality includes support for AIS,
idle, RAI, AIC, FEAC, path parity, FEBE detection/inser-
tion, detection of DS3 frame errors (OOF and SEF), and
DS3 performance monitoring per ANSI T1.231.
E3 monitoring functionality includes detection of REI,
RDI, LOF, AIS, and BIP-4/BIP-8 parity errors, as well as
errored block and errored second indications.
AMCC
200 Brickstone Square, Andover, MA 01810 Ph: (978)-623-0009 Fax:(978)-623-0024
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
