QT2022/32 - Data Sheet: DS3051
Each LED driver can be independently programmed to monitor either the transmit path or the receive path, con-
trolled by bit 3 of the LED Configuration Registers. LED1 monitors the transmit path by default, while LED2 and
LED3 monitor the receive path by default.
TxXAUI lane alignment is used as the link status indication on the transmit path. PCS block_lock is used as the link
status indication on the receive path. A packet activity event will be generated when the packet start code ||S|| is
detected in the PCS encoder for transmit path or in the PCS decoder for the receive path.
In ‘Activity Status’ mode the LED will be off normally and flash on for 50 or 100ms on at each activity event, and will
be subsequently turned off for 25 or 50ms. Any packet activity events that occur before the LED toggle cycle fin-
ishes will be ignored. figure 19 on page 71 shows the LED stretching behavior for activity only mode.
In ‘Link Status / Activity Status Combined’ mode the LED is ON to indicate the link is up and OFF to indicate the link
is down. When the link is up, the LED will turn off for 25 or 50ms for each activity event, and will be subsequently
turned on for 50 or 100ms. Any packet activity events that occur before the LED toggle cycle finishes will be
ignored. figure 20 on page 72 shows the LED stretching behavior for link/activity combined mode.
The stretch time is controlled by bit 4 of the LED Configuration Registers. This determines the amount of time the
LED will flash on during a packet activity event. When set to a 0 (default) the stretch time is 50ms; when set to a 1,
the stretch time is 100ms. The time the LED is turned off during the packet activity event is equal to half the stretch
time.
When in Link Status Only mode, the LED is OFF when the link is down. The LED is ON when the link is up.
The LED driver pins are open drain circuits (10mA max current rating). When the LED is ON, the driver pin is driven
low (control register bits 2:0 = ‘101’). When the LED is OFF, the driver pin is high impedance (control register bits
2:0 = ‘100’).
LED1 and LED2 are in “Link Status and Activity” monitor mode by default. LED3 is in “Link Status Only” mode by
default.
The LED2 pin is also used to enable ‘two-byte’ indirect addressing on the I2C bus. To enable this feature, the LED2
pin is held low during a hard reset (using RESETN pin).
Figure 19: LED Stretching for Activity Only Mode
Packet
Activity
Event
25/50ms
LED
50/100ms
50/100ms
Note: The direct drive LED output in this diagram is shown as active low
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