QT2022/32 - Data Sheet: DS3051
To perform a RMDIO read transaction, the user needs to:
•
•
Enable the RMDIO feature for transmission in the local PHY by writing a 1 to Register bit 3.CC08.0.
Enable the RMDIO feature for reception in the remote PHY by writing a 1 to Register bit 3.CC08.1. (This
requires local access to the remote PHY.)
•
•
•
Specify the device and register address he wants to remotely access. The device address is specified in
MDIO register field 3.CC09h.5:0 and the register address is specified in MDIO register 3.CC0Ah.
Perform a remote read transaction by writing a 1 to Register 3.CC08h.2. This triggers a RMDIO read
request.
Read the RMDIO Status register 3.CC0Bh to check the “Read Request Sent” flag to see if the command
was sent (bit0) and the “Read Response Received” flag to see if the response was received (bit2). These
flags are latching bits that are cleared on read.
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•
After the “Read Response Received” flag is set, the register content of the remote PHY will then be stored
in register 3.CC0Ch of the local PHY.
To perform further RMDIO reads, the “RMDIO Read Request” bit in Register 3.CC08h (bit2) must first be
reset to ‘0’.
To perform a RMDIO write, the user needs to:
•
•
Enable the RMDIO feature for transmission in the local PHY by writing a 1 to Register bit 3.CC08.0.
Enable the RMDIO feature for reception in the remote PHY by writing a 1 to Register bit 3.CC08.1. (This
requires local access to the remote PHY.)
•
Specify the device and register address he wants to remotely access. The device address is specified in
MDIO register field 3.CC09h.5:0 and the register address is specified in MDIO register 3.CC0Ah.
•
•
Specify the 16-bit value to be written to the remote PHY. This data is stored in Register 3.CC0Eh.
To perform a remote write transaction by writing a 1 to Register 3.CC08h.3. This triggers a RMDIO write
request.
•
•
Read the RMDIO Status register 3.CC0Bh to check the “Write Request Sent” flag to see if the command
was sent (bit1) and the “Write Response Received” flag to see if the response was received (bit3). These
flags are latching bits that are cleared on read.
To perform further RMDIO writes, the “RMDIO Write Request” bit in Register 3.CC08h (bit3) must first be
reset to ‘0’.
NOTE: The user is responsible to check the status bit to make sure that the current transaction is complete before
attempting a new one. If this rule is not followed, the second transaction might be ignored. As well, there is no built-
in mechanism to handle the loss of RMDIO request or response messages. It is up to the user to monitor the status
bits and re-initiate a new transaction if the previous one failed (i.e. user specified time-out).
The RMDIO write transaction is password protected to prevent accidentally modifying register contents. The pass-
word is stored in Register 3.CC0Fh. The correct password must be written to this register to enable RMDIO writes.
Please contact AMCC for further information.
The RMDIO Read/Write Feature has precedence over the PRBS feature. If a RMDIO read/write transaction is initi-
ated while the PRBS feature is turned on, the PRBS test will be automatically interrupted and then turned on again
once the read/write transaction is complete. The RMDIO read/write request and response messages will get intro-
duced in the IPG stream at the next possibility (3 Idle blocks required).
The RMDIO Message format is composed of a QSTART, followed by a RMDIO Data Block and terminated with a
QTERM.
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