Revision 1.23 - Sept 21, 2006
PowerPC 440SPe Embedded Processor
Preliminary Data Sheet
Table 11. DC Power Supply Loads
Parameter
Symbol
Minimum
Typical
Maximum
3000
30
Unit
mA
mA
mA
mA
mA
mA
Notes
V
DD (1.5V) active operating current
IDD
2
2
2
OVDD (3.3V) active operating current
PxVDD (3.3V) active operating current
PxVDD (1.5V) active operating current
SVDD (2.5V) active operating current
SVDD (1.8V) active operating current
IODD
IPDD
IPDD
ISDD
ISDD
IADD
IAPDD
-
-
-
-
-
1200
285
2
580
2
AxV
DD
(1.5V) input current
(1.5V) input current
33
33
mA
mA
1, 2
1, 2
APxV
DD
Notes:
1. See “Absolute Maximum Ratings” on page 58 for filter recommendations.
2. Valid only for CPU/PLB/OPB = 533.33/133.33/66.66 MHz.
Clock Test Conditions
Output
Pin
Clock timing and switching characteristics are specified in accordance with operating
conditions shown in the table “Recommended DC Operating Conditions.” AC
C
10pF
specifications are characterized with V = 1.5V, T = +95°C and a 10pF test load as
DD
C
shown in the figure to the right.
Table 12. Clocking Specifications
Symbol
SysClk Input
FC
Parameter
Min
Max
Units
Frequency
Period
33.33
83.33
30
MHz
ns
TC
12
T
Edge stability (cycle-to-cycle jitter)
–
±0.15
ns
CS
TCH
TCL
High time
Low time
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
Note:Input slew rate ≥ 1V/ns
PLL VCO
FC
TC
Frequency
Period
600
1333.33
1.66
MHz
ns
0.75
62
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
